Apparatus and method for making a low capacitance artificial...

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal

Reexamination Certificate

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C257S419000, C257S619000, C438S053000

Reexamination Certificate

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07075161

ABSTRACT:
An apparatus and method for making a nanopore chip exhibiting low capacitance. The apparatus provides a thin diaphragm on a rigid semiconductor frame suitable for nanopore fabrication, the diaphragm having associated thicker insulator regions to reduce capacitance. Also disclosed is a method of making the apparatus.

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patent: 2005/0009171 (2005-01-01), Fertig et al.
Li et al., “Ion-Beam Sculpting At Nanometre Scales”, Nature, vol. 412, Jul. 12, 2001, pp. 166-169.
Matzke et al., Title: “Integratible Process For Fabrication Of Fluidic Microduct Networks On A Single Wafer”, Proceedings Of The SPIE-The International Society For Optical Engineering SPIE-Int. Soc. Opt. Eng USA, vol. 3877, 1999, pp. 110-118.
Copy of European Search Report Dated: Aug. 15, 2005.

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