Apparatus and method for linear dead store elimination

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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C717S152000, C717S154000, C717S159000, C717S155000

Reexamination Certificate

active

07444626

ABSTRACT:
An apparatus and method for removing stores to local variables that are not aliased by other variables or to variables which have already been removed by previous optimizations prior to performing dead store elimination optimization are provided. With the method and apparatus, instructions that include a memory reference to a local variable that is not modified by other instructions are identified. For these instructions, an identifier of the variable referenced is maintained in a data structure along with the location of the store instruction in the procedure (for a store instruction) or a load indicator (for a load instruction). The data structure is then traversed to see if there are any store instructions referencing a variable that does not have a corresponding load instruction referencing the same variable. Such store instructions are eliminated prior to performing traditional dead store elimination.

REFERENCES:
patent: 5768596 (1998-06-01), Chow et al.
patent: 5956512 (1999-09-01), Simmons et al.
patent: 5999736 (1999-12-01), Gupta et al.
patent: 6317876 (2001-11-01), Kunz et al.
patent: 6609249 (2003-08-01), Kunz et al.
patent: 6820101 (2004-11-01), Wallman
patent: 2002/0095669 (2002-07-01), Archambault
patent: 2005/0166194 (2005-07-01), Rubin et al.
Knoop, et al. “Partial Dead Code Elimination”, 1994, ACM, pp. 147-158.
Bodik, et al. “Partial Dead Code Elimination using Slicing Transformations”, 1997, ACM, pp. 159-170.
Lo et al., “Register Promotion by Sparse Partial Redundancy Elimination of Loads and Stores”, Silicon Graphics Computer Systems, Mountain View, CA, 1998 ACM, pp. 26-37.
Sastry et al., “A New Algorithm for Scalar Register Promotion Based on SSA Form”, Performance Delivery Laboratory, Hewlett Packard Company, Cupertino, CA, 1998 ACM, pp. 15-25.
Kennedy et al., “Partial Redundancy Elimination in SSA Form”, Silicon Graphics Computer Systems, (1999 ACM), ACM Transactions on Programming Languages and Systems pp. 1-50.

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