Apparatus and method for interrupt processing in a code division

Multiplex communications – Wide area network – Packet switching

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370479, G06F 946

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active

059013214

ABSTRACT:
An apparatus and method for interrupt processing are provided, in which an interrupt is latched in a synchronous system in order to process the interrupt of a code division multiple access switching apparatus. An interrupt of higher priority order is processed by arbitrarily designating the priority order of the interrupt, and then an interrupt of lower priority order is processed in order, regardless of the priority order, thereby being used in a control system of the code division multiple access switching apparatus to which an interrupt having no priority order is applied.

REFERENCES:
patent: 4761732 (1988-08-01), Eldumiati et al.
patent: 5101497 (1992-03-01), Culley et al.
patent: 5197083 (1993-03-01), Gandini et al.
patent: 5471620 (1995-11-01), Shimizu et al.
IBM, "Intelligent Input/Output Interrupt Processing", IBM Technical Disclosure Bulletin, vol. 17, No. 7, pp. 1915-1916, Dec. 1974.

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