Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Patent
1998-12-15
2000-11-28
Cunningham, Terry D.
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
327205, H03K 522
Patent
active
061540668
ABSTRACT:
An apparatus and method for interfacing integrated circuits having incompatible input-output signal offset voltages that is relatively inexpensive and yet is also insensitive to noise. The apparatus of the present invention includes a receiver circuit for receiving differential signals on a differential line, comprising: (1) an interface circuit coupled to the differential signal line for removing a first offset voltage from the differential signal and biasing the differential signal to generate a biased differential signal having a second offset voltage, the interface circuit including a plurality of capacitive devices, (2) a differential amplifier circuit coupled to the interface circuit for converting the biased differential signal into a single-ended signal, (3) a Schmitt trigger circuit coupled to the differential amplifier circuit for filtering the single-ended signal to generate a filtered single-ended signal and (4) a latch circuit coupled to the Schmitt trigger circuit for filtering and asynchronously latching the filtered single-ended signal to generate a sustained, filtered digital signal. The method of the present invention comprises the steps of: (1) capacitively removing a first offset voltage from the differential signal, (2) biasing the differential signal to generate a biased differential signal having a second offset voltage, (3) converting the biased differential signal into a single-ended signal, (4) filtering the single-ended signal using a hysteresis-loop transfer function to generate a filtered single-ended signal and (5) filtering and latching the filtered single-ended signal using a delayed regenerative feedback, hysteresis-loop transfer function to generate a sustained, filtered digital signal.
REFERENCES:
patent: 4471235 (1984-09-01), Sakhuja et al.
patent: 4716322 (1987-12-01), D'Arrigo et al.
patent: 5434545 (1995-07-01), Burchfield
patent: 5570052 (1996-10-01), Fonderie et al.
patent: 5642244 (1997-06-01), Okada et al.
patent: 5982209 (1999-11-01), Magazzu' et al.
"LVDS Owner's Manual: Moving Info with LVDS", Chapter 1, Introduction to LVDS, pp.l 1-3, Revision 1.0, Spring 1997, National Semiconductor.
"IEEE Standard for a High Performance Serial Bus", Section J.6 Isolation Barrier, pp. 347-348, IEEE Std 1394-1995, Published by the IEEE, New York, NY 10017, dated Aug. 30, 1996, SH94364.
Griffith Robert R.
Ng Alan K.
Wen Roy M.
Cunningham Terry D.
Galliani William S.
Oak Technology, Inc.
LandOfFree
Apparatus and method for interfacing integrated circuits having does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for interfacing integrated circuits having , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for interfacing integrated circuits having will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1729625