Liquid purification or separation – Processes – Liquid/liquid solvent or colloidal extraction or diffusing...
Reexamination Certificate
1999-10-12
2001-03-13
Therkorn, Ernest G. (Department: 1723)
Liquid purification or separation
Processes
Liquid/liquid solvent or colloidal extraction or diffusing...
C210S656000, C210S681000, C210S688000
Reexamination Certificate
active
06200478
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates in general to the field of removing impurities from wet chemicals used in the processing of semiconductor silicon wafers and, in particular to, an apparatus and method for removing ionized impurities from wet chemicals.
This application claims priority under 35 U.S.C. § 9(e)(1) of provisional patent application number 60/051,251 filed Jun. 30, 1997.
BACKGROUND OF THE INVENTION
Without limiting the scope of the invention, the background is described in connection with the manufacture of silicon wafers, as an example.
Heretofore, in this field, a series of wet chemicals are used in the processing and washing steps following the deposition of operative layers on silicon wafers. In the process of fabricating modern semiconductor integrated circuits, it is necessary to form conductor lines and other structures above previously formed structures. Irregularities on the surface of silicon wafers may be caused by impurities in wet chemicals that are used in the processing and washing steps, which lead to irregularities during the deposition of subsequent layers.
Irregularities caused by the outplating of ions, such as metallic or organic ions, can easily result in incomplete coverage, breakage in the deposited material or voids when a subsequent layer is deposited directly over the aforementioned highly irregular surfaces. Outplating occurs when ions, normally metallic or organic, reach out from a washing solution, such as hydrofluoric acid, and become deposited on a silicon substrate. Even trace levels of outplated impurities lead to degradation of minority-carrier lifetime as well as premature breakdown of gate oxide layers.
Unfortunately, these irregularities cannot be alleviated at the next major processing step because it is assumed that the top surface topography is at its cleanest following a washing step. Worse yet, these cleaning steps often take place prior to furnace operations which drive surface impurities in to the bulk material. These irregularities tend to become more pronounced as subsequent layers are deposited, causing further problems as the layers stack up in the subsequent processing of the semiconductor structure. Depending upon the type of material and their intended purposes, numerous and undesirable characteristics are produced when outplating irregularities occur. Incomplete coverage of insulating oxide layers can lead to short circuits between metallization layers. Likewise, voids may trap air or process gasses, either contaminating further processing steps, creating weak spots in the film or simply lowering overall device reliability. One problem widely recognized in the wafer manufacturing process is that, in general, processing high density circuits over highly irregular structures can lead to very poor yields in device performance.
Consequently, it is desirable to effect some type of planarization or flattening of integrated circuit structures in order to facilitate the processing of multi layer integrated circuits and to improve their yields, performance and reliability. In fact, all of today's high density integrated circuit fabrication techniques make use of some method of forming planarized structures at critical points in the fabrication process.
Impurities in wet chemicals have been identified by monitoring the yield of silicon chips derived from a silicon wafer. During the fabrication of very large scale integrated circuits, for example, large amounts of wet chemicals are used in the polishing steps that accompany the etching and polishing pieces of silicon wafer manufacture prior to a high temperature operation.
It has been found that present methods of transporting and processing chemicals used in the semiconductor industry leads to an increase in the amount of impurities from the time the chemicals are received to the time that the chemicals are used. These impurities lead to a lower bath life for the processing chemicals due to the increase in ionic contaminants within the bath. As the life of the bath increases, so does the level of these contaminants. The ionic contamination of the process chemicals results in significant costs during semiconductor wafer processing. These costs are derived not only from the need to change the semiconductor processing chemicals but also from the decrease-in-yield cost by the impurities that deposit on the surface of silicon chips.
Therefore, what is needed is a device and method for removing ionic impurities from semiconductor manufacturing chemicals. Also, what is needed is an apparatus and a method that results in significant cost savings and a decreased impact on the environment.
SUMMARY OF THE INVENTION
The present invention solves the problems associated with ionic contaminants in semiconductor wafer processing chemicals. An apparatus and method is disclosed for removing ionic contaminants from semiconductor processing chemicals comprising a polymerized crown-ether film covalently bonded to a non-reactive chemical support.
The present invention is an apparatus and method for decontaminating chemical solutions, referred to as wet chemicals, commonly used for processing semiconductor silicon wafers. More specifically, the present invention is a purifier used to remove ionic impurities and contaminants produced during semiconductor distribution, wherein the inline non-reactive chemical support is positioned in a chemical distribution system and the crown ether polymer chelated contaminants, inline. Using the purifier of the present invention, varied low levels of impurities can be removed from chemical solutions that will come in contact with silicon wafers during the processing and production of integrated circuits. The types of impurities that can be removed using the present invention include both metallic and organic impurities. Examples of metallic impurities may include, for example, Fe, Ni, Ag, Cu, Au, Pb, and Pd.
The present invention m7ay be used to remove any of the metals in Group IIIA and IIB of the Periodic Table of Elements. Semiconductor processing chemicals containing these impurities lead to increased silicon chip failures and decreased yields. The impurities attach to the silicon chips on the silicon wafer during, for example, washing steps.
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Zhao and Bartsch, Journal of Polymer Science, No. 33, pp. 2267-2274 (1995).
Chorush Russell A.
Hogan Jeremiah D.
Brady III W. James
Garner Jacqueline J.
Telecky Frederick J.
Texas Instruments Incorporated
Therkorn Ernest G.
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