Static information storage and retrieval – Floating gate – Particular biasing
Patent
1990-04-25
1993-07-27
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Particular biasing
G11C 1134
Patent
active
052316025
ABSTRACT:
An apparatus and method for improving the reliability of floating gate transistors used in memory cell applications by controlling the electric field induced across the tunnel oxide region of the floating gate transistor when discharging electrons from floating gate is provided. The invention comprises method and apparatus for varying the resistance applied to the drain electrode of the floating gate device and/or varying the voltage applied to the source electrode of the floating gate device to control the electric field in the tunnel oxide region of the floating gate device. In the preferred embodiment of the invention utilized in an EEPROM memory cell, both a method and an apparatus applying a variable resistance and a method and an apparatus applying a variable voltage are utilized simultaneously. The method and apparatus provide an optimal electric field intensity to control electron tunneling in the tunnel region of the floating gate device during discharge of electrons from the floating gate.
REFERENCES:
patent: 4627027 (1986-12-01), Rai et al.
patent: 4780750 (1988-10-01), Nolan et al.
Briner Michael S.
Radjy Nader A.
Advanced Micro Devices , Inc.
Popek Joseph A.
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