Apparatus and method for implementing watchpoints and breakpoint

Details Apparatus and method for implementing watchpoints and breakpoint Apparatus and method for implementing watchpoints and breakpoint

1995-08-28

1998-05-19

Voeltz, Emanuel Todd

395591, 39518311, 395704, G06F 900

Patent

active

057548390

ABSTRACT:
An apparatus and method for implementing watchpoints and breakpoints in a data processing system (110). In one embodiment, a pipelined processor (110) performs each instruction of a program. One or more watchpoints are associated with the instructions. The processor includes a history buffer (50) for storing processor state values at the time when each of the instructions was executed, until a predetermined time. Watchpoint information associated with a particular watchpoint is also stored in the history buffer (50), in association with the processor state values, such that the processor state is changed and the watchpoint is announced at the predetermined time. The watchpoint information may include increment/decrement information for one or more counters (41, 42). Breakpoint information may also be stored in history buffer (50).

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"Implementing Precise Interruptions in Pipelined Processors RISC Processors", Wang et al., IEEE Micro, 1993, pp. 36-43.

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