Apparatus and method for implementing floating point...

Details Apparatus and method for implementing floating point... Apparatus and method for implementing floating point...

2006-04-27

2011-11-29

Bullock, Jr., Lewis (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S503000, C708S505000, C708S495000, C375S240190

Reexamination Certificate

active

08069200

ABSTRACT:
A floating point (FP) shifter for use with FP adders providing a shifted FP operand as a power of the exponent base (usually two) multiplied by a FP operand. First arithmetic processor using at least one FP shifter with FP adder. FP adder for N FP operands creating FP result, where N is at least three. Second arithmetic processor including at least one FP adder for N operands. Descriptions of FP shifter and FP adder for implementing their operational methods. Implementations of FP shifter and FP adder.

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