Apparatus and method for implementing efficient arithmetic...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C708S654000

Reexamination Certificate

active

07124161

ABSTRACT:
Efficient implementation of arithmetic circuits in programmable logic devices by using Look-Up Tables (LUTs) to store pre-calculated values. A table look-up operation is performed in place of complex arithmetic operations. In this way, at the expense of a few LUTs, many logic elements can be saved. This approach is particularly applicable to circuits for calculating reciprocal values and circuits for performing normalized LMS algorithm.

REFERENCES:
patent: 5153851 (1992-10-01), Kanazawa et al.
patent: 5768171 (1998-06-01), Chow
patent: 5818744 (1998-10-01), Miller et al.
patent: 5825681 (1998-10-01), Daniel et al.
patent: 6260054 (2001-07-01), Rosman et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Apparatus and method for implementing efficient arithmetic... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus and method for implementing efficient arithmetic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for implementing efficient arithmetic... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3719132

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.