Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2000-08-03
2003-05-20
Cunningham, Terry D. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S117000
Reexamination Certificate
active
06566921
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to an improved method for frequency generation and in particular to an apparatus and a method for adjusting the generated frequency. Still more particularly, the present invention provides an apparatus and a method for high resolution frequency adjustment using a multistage frequency synthesized.
2. Description of the Related Art
A phase locked loop (PLL) is a very interesting integrated circuit that blends analog and digital techniques. Although the basic design of a PLL has been known for decades, the circuit only became a practical building block in integrated circuit form where the cost has become affordable and the design has become more reliable.
The PLL contains a phase detector, an amplifier, a voltage controlled oscillator (VCO), and a feedback loop that allows the output frequency to be a replication of the input signal with noise removed or a multiple of the frequency of the input signal. PLLs have been used for demodulation of FM signals, for tone decoding, for frequency generation, for generation of “clean” signals, and for pulse synchronization, to name but a few of the applications. Because the output frequency is a multiple of the input frequency, it is difficult to make fine frequency adjustments using such a frequency synthesizer.
A non-uniform memory access (NUMA) computer system is a multiple processor architecture where there is a single memory address space but where memory is separated into “close” banks of memory and “distant” banks of memory. Access is “non-uniform” because the access times for the close banks of memory directly associated with the node that contains the CPU are much faster than the access times for distant memory banks at other nodes in the system. A distinct advantage of a NUMA architecture is that it scales well, in the sense that adding more nodes and processors to the system does not create bottlenecks that degrade performance in the same way as other parallel architectures.
One problem with NUMA architectures is to keep the nodes synchronized. Transactions are often labeled with time stamps that are generated by the time of day at each node in the system. Since these nodes have independent clocks, even though they are initialized at precisely the same time, they will eventually drift apart and require re-synchronization. It is important to have precise time stamps with as little “cycle slippage” as possible between the nodes.
Therefore, it would be advantageous to have a frequency synthesizer that is capable of rapid, high resolution frequency adjustments.
SUMMARY OF THE INVENTION
An apparatus and a method is presented for making high resolution frequency adjustments in a multistage frequency synthesizer. The initial stage of the frequency synthesizer is a conventional phase lock loop connected to a dynamically variable frequency divider.
There are one or more intermediate stages that consist of the forward portion of a phase locked loop with feedback through a fixed frequency divider and connected to a dynamically variable frequency divider. The final stage consists of the forward portion of a phase locked loop with feedback through a fixed frequency divider and connected to another fixed frequency divider.
By varying the constant of division in the variable frequency dividers in the circuit, fine frequency adjustments can be made very rapidly. The precision of the adjustments depends on the relative values of the frequency dividers and the number of intermediate stages in the system.
REFERENCES:
patent: 4434696 (1984-03-01), Conviser
patent: 4481489 (1984-11-01), Kurby
patent: 5059925 (1991-10-01), Weisbloom
patent: 5276408 (1994-01-01), Norimatsu
patent: 5349310 (1994-09-01), Rieder et al.
patent: 5353311 (1994-10-01), Hirata et al.
patent: 5603099 (1997-02-01), Watanabe
patent: 5694089 (1997-12-01), Adachi et al.
patent: 5710524 (1998-01-01), Chou et al.
patent: 5751665 (1998-05-01), Tanoi
patent: 5914592 (1999-06-01), Saito
patent: 6118316 (2000-09-01), Tamanura et al.
patent: 6188258 (2001-02-01), Nakatani
patent: 0881775 (1998-02-01), None
patent: 07336217 (1995-12-01), None
Ishihara (Development of Digitally Controlled Rubidium Atomic Oscillator, Foury-Fourth Annual Symposium On Frequency Control, CH2818-3/90/0000-059 IEEE, pp. 59-65).*
Dynamic Behavior of a Phase-Locked Loop Using D-Type Phase Detector and Nonlinear Voltage-Controlled Oscillator; Boerstler, David W.; Mar. 21, 1981.
Boerstler David William
Dean Mark Edward
Ngo Hung Cai
Zimmerman Andrew Christian
Cunningham Terry D.
International Business Machines - Corporation
Salys Casimer K.
Tra Quan
Walder, Jr. Stephen J.
LandOfFree
Apparatus and method for high resolution frequency... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for high resolution frequency..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for high resolution frequency... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3028222