Apparatus and method for high-level synthesis of a logic circuit

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364488, G06F 1750

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active

057062056

ABSTRACT:
A high-level synthesis apparatus synthesizes a large-scale logic circuit. The apparatus has a unit for generating a control description graph according to a behavioral description graph written in a behavioral description language; a unit for sorting the control description graph according to control conditions and extracting single flows including partial graphs or closed loops from the sorted control description graph; a unit for providing an initial circuit; a unit for dividing the single flows into execution steps; a unit for allocating hardware parts of the initial circuit to the execution steps; and a unit for converting each of the single flows into a finite state machine and combining the finite state machines into one. This apparatus optimizes each single flow and adds parts to or modifies the initial circuit, to synthesize a large-scale circuit.

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Toshiaki Miyazaki et al. "High-Level Synthesis Using Given Datapath Information" ICEC Trans. Fundamentals, vol. E76-A, No. 10 Oct. 1993 pp. 1617-1625.

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