Apparatus and method for generating clock signals

Details Apparatus and method for generating clock signals Apparatus and method for generating clock signals

2005-10-11

2005-10-11

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S161000

Reexamination Certificate

active

06954095

ABSTRACT:
A delay-locked loop circuit generates a first clock signal. The delay-locked loop circuit includes a first delay element coupled in a feedback path of the delay-locked loop circuit to advance the first clock signal relative to a reference clock signal by a first time period. A second delay element is coupled to receive the first clock signal from the delay-locked loop circuit. The second delay element also outputs a second clock signal that is delayed relative to the first clock signal by the first time period. The delay-locked loop circuit may include a phase detector to identify phase differences between the first clock signal and the reference clock signal. A third delay element may be coupled between the delay-locked loop circuit and the second delay element.

REFERENCES:
patent: 5634043 (1997-05-01), Self et al.
patent: 6108794 (2000-08-01), Erickson
patent: 6140854 (2000-10-01), Coddington et al.
patent: 6229363 (2001-05-01), Eto et al.
patent: 6294938 (2001-09-01), Coddington et al.
patent: 6469555 (2002-10-01), Lau et al.
patent: 6731148 (2004-05-01), Lau et al.

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