Apparatus and method for generating a phase-controlled clock sig

Details Apparatus and method for generating a phase-controlled clock sig Apparatus and method for generating a phase-controlled clock sig

1994-04-15

1996-09-17

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327117, 327147, 327156, 377 48, H03K 2108

Patent

active

055572243

ABSTRACT:
A method and apparatus are provided for generating a phase-controlled clock signal within a microprocessor. A first clock signal having a first frequency is input. After a reset event, the first clock signal transitions in a first direction at a time t. A second clock signal is output having a second frequency related to the first frequency by a non-integer ratio. The second clock signal transitions in the same direction as the first clock signal at time t.

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"TP 12.1: A 3.3V 0.6um BiCMOS Supescalar Microprocessor", 1994 IEEE Internat'l Solid-State Circuits Conf., IEEE, Feb. 1994, Cat. No. 94CH3410-8, pp. 201-203.

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