Apparatus and method for forming vias

Semiconductor device manufacturing: process – Having organic semiconductive component

Reexamination Certificate

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C438S759000, C438S780000, C438S781000, C257SE21577

Reexamination Certificate

active

07341886

ABSTRACT:
A method and apparatus for forming vias in one or more layers, comprising providing a vacuum chamber, one or more beams in the vacuum chamber. The array of directed beams located in alignment with a layer for ablating one or more areas of the layer for forming vias. A cold trap is also provided in the vacuum chamber that is in fixed alignment with respect to the one or more beams such that the ablated material condenses upon the cold trap at the time and location when the one or more vias is being formed.

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patent: 5814417 (1998-09-01), Nagayama
patent: 6136622 (2000-10-01), Fukuzawa et al.
patent: 6214651 (2001-04-01), Cox
patent: 6629375 (2003-10-01), Mallsion et al.
patent: 6683277 (2004-01-01), Millard et al.
patent: 6692094 (2004-02-01), Cok
patent: 6797919 (2004-09-01), Millard et al.
patent: 2004/0051446 (2004-03-01), Werner et al.
patent: 2004/0253756 (2004-12-01), Cok
patent: WO9903157 (1999-01-01), None

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