Apparatus and method for expediting subtraction procedures in a

Details Apparatus and method for expediting subtraction procedures in a Apparatus and method for expediting subtraction procedures in a

1987-06-30

1989-08-29

Malzahn, David H.

Boots, shoes, and leggings

G06F 750

Patent

active

048624055

ABSTRACT:
In a multiplier unit implemented with carry/save adder stages and executing a modified Booth algorithm, the signals, required to complete the 2's complement in order to perform a subtraction operation during the multiplication procedure using carry/save adder cells, are entered in the first carry/save stage in the appropriate carry/save cell positions. In this manner, one less signal is processed by the time-critical least significant cell associated with each carry/save adder stage, thereby reducing the overall time delay associated with the multiplier unit and accelerating the multiplication operation.

REFERENCES:
patent: 3372269 (1968-03-01), MacSorley et al.
patent: 4041292 (1977-08-01), Kindell
patent: 4228520 (1980-10-01), Letteney et al.
patent: 4484301 (1984-11-01), Borgerding et al.
patent: 4646257 (1987-02-01), Essig et al.
patent: 4752905 (1988-06-01), Nakagawa et al.

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