Boots – shoes – and leggings
Patent
1995-03-23
1996-03-19
Trans, Vincent N.
Boots, shoes, and leggings
364488, G06F 1750
Patent
active
055008089
ABSTRACT:
A new method and structure are provided for simulating the time delay associated with signal propagation through a mapped and optimized logic network for a selected target technology using only information from an unmapped logic network. For each target technology, the method and structure include the time delay characteristics of the mapping and optimization strategies used to generate an optimized network using the library of standard gates for that target technology. The functional complexity of each unmapped logic node and the complexity of the fanout for each unmapped logic node are also included in the simulated time delay.
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Synopsys Inc.
Trans Vincent N.
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