Pulse or digital communications – Pulse code modulation
Reexamination Certificate
1998-06-12
2002-08-06
Tse, Young T. (Department: 2634)
Pulse or digital communications
Pulse code modulation
C375S219000, C375S377000, C370S423000
Reexamination Certificate
active
06430225
ABSTRACT:
TECHNICAL FIELD
This invention relates to a transmission apparatus for carrying out transmission of digital data, and a method therefor.
BACKGROUND ART
As the interface standard which has supported high speed data transfer and real time transfer with a view to realization of interface for data transfer, IEEE 1394 high performance serial bus standard (hereinafter referred to as IEEE 1394 standard) is known.
In this IEEE 1394 standard, data transfer rates (speeds) at 100 Mbps (98.304 Mbps), 200 Mbps (196.608 Mbps) and 400 Mbps (393.216 Mbps) are prescribed. The 1394 port having high order transfer rate is prescribed so as to hold compatibility with the low order transfer rate thereof. Thus, data transfer rates of 100 Mbps, 200 Mbps and 400 Mbps can exist in mixed state on the same network. Moreover, in the IEEE 1394 standard, as shown in
FIG. 1
, there is employed transfer format of the DS-Link (Data/Strobe Link) coding system such that transfer data is converted into two signals of data signal and strobe signal for compensating that signal to take Exclusive logical sum of these two signals so that clock can be generated. Further, as the cable structure is shown in the cross sectional view of
FIG. 2
, there is prescribed a cable
200
of the structure in which the entirety of cable in which two sets of twist pair lines (signal lines)
202
shielded by respective first shield layers
201
and power lines
203
are bundled is further shielded by a second shield layer
204
.
Moreover, in the connection system in the IEEE 1394 standard, two kinds of systems of the daisy chain and the node branch can be used. In the daisy chain system, 16 nodes (equipment having the 1394 port) at the maximum can be connected and the longest distance between respective nodes is set to 4.5 m. As shown in
FIG. 3
, by using the node branch in combination, as far as 63 nodes (physical node addresses) which is the maximum in the standard can be connected.
Further, in .the IEEE 1394 standard, plug-in/plug-out of the cable of the structure as described above can be carried out in the state where the equipment is operative, i.e., the state where power is turned ON. At the time point when node is supplemented on deleted, reconstruction of the 1394 network is automatically carried out. At this time, equipments of the connected nodes can be automatically recognized, and IDs and/or arrangement of the connected equipments are caused to undergo management on the interface.
The components and the protocol architecture of the interface in conformity with the IEEE 1394 standard are shown in FIG.
4
. The interface of the IEEE 1394 standard can be classified into hardware and firmware.
The hardware consists of physical layer (PHY) and link layer.
Further, in the physical layer, signal of the IEEE 1394 standard is directly driven. In addition, the link layer comprises interface between host interface and physical layer.
The firmware consists of transaction layer consisting of management driver for carrying out actual operation with respect to interface in conformity with the IEEE 1394 standard and management layer consisting of driver for management of network in conformity with the IEEE 1394 standard which is called SBM (Serial Bus Management).
Further, application layer consists of software that user uses and management software which interfaces with the transaction layer or the management layer.
In the IEEE 1394 standard, transfer operation carried out within the network is called subaction and the following two kinds of subactions are prescribed. Namely, as two subactions, the asynchronous transfer mode called “asynchronous” and synchronous transfer mode which has guaranteed transfer band called “isochronous” are defined. Further, respective subactions are classified into the following three parts to take transfer states called “arbitration”, “packet transmission” and “acknowledgment”.
In the asynchronous subaction, the asynchronous transfer is carried out. In
FIG. 5
showing the transition state in point of time in this transfer mode, the first subaction gap indicates the idle state of bus. By monitoring time of this subaction gap, whether or not new transfer can be carried out after transfer immediately before is completed is judged.
Further, when idle state of predetermined time or more lasts, the node which desires to carry out transfer judges that the bus can be used to execute arbitration for acquiring the control right of bus. In practice, judgment of stop of bus is carried out by node B positioned at the route as shown in FIGS.
6
(
a
), (
b
). The node which has obtained the control right of bus by such arbitration then executes transfer of data, i.e., packet transmission. After the data transfer, the node which has received data executes responsive acknowledgment by sending back of ack (sending back code for confirmation of reception) corresponding to that reception result with respect to the transferred data. By execution of this acknowledgment, it can be confirmed by the content of the ack that transfer has been normally carried out along with transmission and reception nodes.
Thereafter, the system state returns to the subaction gap, i.e., idle state of bus for a second time. Thus, transfer operation as described above is repeated.
Moreover, in the isochronous subaction, transfer of the structure similar to the asynchronous transfer is essentially carried out. As shown in
FIG. 7
, transfer in this case is executed preferentially to the asynchronous transfer at the asynchronous subaction. The isochronous transfer in this isochronous subaction is executed preferentially to the asynchronous transfer at the asynchronous subaction every about 8 kHz, thereby resulting in the transfer mode which has guaranteed transfer band. Thus, transfer of real time data is realized.
In the case of carrying out isochronous transfer of real time data at plural nodes at the same time, channel ID for distinguishing the content (sending node) is set at that transfer data to receive only necessary real time data.
The physical layer in the IEEE 1394 standard as described above consists, as shown in
FIG. 8
, for example, of a physical layer logic block (PHY LOGIC)
102
, a selector block (RXCLOCK/DATA SELECTOR)
103
, respective port logic blocks (PORT LOGIC 1, PORT LOGIC 2, PORT LOGIC 3)
104
,
105
,
106
, respective cable ports (CABLE PORT
1
, CABLE PORT
2
, CABLE PORT
3
)
107
,
108
,
109
, and a clock generating block (PLL)
110
.
The physical layer logic block
102
serves to carry out I/O control and arbitration control to and from link layer in the IEEE 1394 standard, and is connected to a link layer controller
100
and is connected to the selector block
103
and the respective port logic blocks
104
,
105
,
106
.
The selector block
103
serves to carry out selection of data (DATA
1
, DATA
2
, DATA
3
) and their receiving clocks (RXCLK
1
, RXCLK
2
, RXCLK
3
) received through logic blocks
104
,
105
,
106
connected to the respective cable ports
107
,
108
,
109
, and is connected to the physical layer logic block
102
and the respective port logic blocks
104
,
105
,
106
.
In the case of transmission of data, this selector block
103
sends, to all port logic blocks
104
,
105
,
106
, packet data (DATA) sent from the physical layer logic block
102
. Moreover, in the case of reception, the selector block
103
selects one set of packet data (DATA
1
, DATA
2
, DATA
3
) and their receiving clocks (RXCLK
1
, RXCLK
2
, RXCLK
3
) received through the respective port logic blocks
104
,
105
,
106
to send, to the physical layer logic block
102
, packet data and their receiving clocks received through the cable ports
107
,
108
,
109
. For example, in the case where the selector block
103
selects packet data (DATA
1
) and its receiving clock (RXCLK
1
) received through the port logic block
104
, the selector block
103
sends, to the physical layer logic block
102
, packet data (DATA
1
) and its receiving clock (RXCLK
1
) that the port logic block
104
has received through the cable port
107
Fujimori Takahiro
Nakamura Akira
Okawa Sumihiro
Takizuka Hiroshi
Frommer William S.
Frommer & Lawrence & Haug LLP
Polito Bruno
Tse Young T.
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