Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Patent
1998-06-04
2000-11-14
Britton, Howard
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
708491, 708703, H04N 736
Patent
active
061480347
ABSTRACT:
An MPEG-1 or an MPEG-2 motion compensation vector encoder circuit achieves smaller circuit area, and hence lower cost, by using circuitry, including ROMs, designed to implement residue arithmetic to calculate sum squared error in a parallel pipelined fashion. A residue-to-binary converter is implemented using distributed arithmetic and a reduction circuit that removes powers of two times the modulus M, both of which use carry save arithmetic operators. An improved ROM-accumulator, used in the residue-to-binary converter, is implemented using carry-save addition within the ROM-accumulator, and ripple-carry or carry-lookahead addition on the output of the ROM-accumulator.
REFERENCES:
patent: 3508220 (1970-04-01), Stampler
patent: 3810108 (1974-05-01), Krewson et al.
patent: 3997882 (1976-12-01), Goyal
patent: 4065756 (1977-12-01), Panigrahi
patent: 4172282 (1979-10-01), Aichelmann et al.
patent: 4185323 (1980-01-01), Johnson et al.
patent: 4232376 (1980-11-01), Dion et al.
patent: 4277838 (1981-07-01), Chambers
patent: 4450520 (1984-05-01), Hollaar et al.
patent: 4507748 (1985-03-01), Cotton
patent: 4590465 (1986-05-01), Fuchs
patent: 4598400 (1986-07-01), Hillis
patent: 4636982 (1987-01-01), Takemae et al.
patent: 4646306 (1987-02-01), Davis et al.
patent: 4677592 (1987-06-01), Sakurai et al.
patent: 4701879 (1987-10-01), Scarr
patent: 4706221 (1987-11-01), Satoh et al.
patent: 4709327 (1987-11-01), Hillis et al.
patent: 4710935 (1987-12-01), Kim et al.
patent: 4716552 (1987-12-01), Maltiel et al.
patent: 4718041 (1988-01-01), Baglee et al.
patent: 4747072 (1988-05-01), Robinson et al.
patent: 4748439 (1988-05-01), Robinson et al.
patent: 4749887 (1988-06-01), Sanwo et al.
patent: 4775810 (1988-10-01), Suzuki et al.
patent: 4783649 (1988-11-01), Fuchs et al.
patent: 4799192 (1989-01-01), Wade et al.
patent: 4831585 (1989-05-01), Wade et al.
patent: 4833642 (1989-05-01), Ooi
patent: 4835733 (1989-05-01), Powell
patent: 4931994 (1990-06-01), Matsui et al.
patent: 4989180 (1991-01-01), Lipovski
patent: 5184325 (1993-02-01), Lipovski
patent: 5214715 (1993-05-01), Carpenter
patent: 5285411 (1994-02-01), McAulay
patent: 5363476 (1994-11-01), Kurashige et al.
patent: 5412763 (1995-05-01), Knoplioch et al.
patent: 5465323 (1995-11-01), Mallet
patent: 5623423 (1997-04-01), Lipovski
patent: 5892632 (1999-04-01), Behrens
Bush, "As We May Think," Atlantic Monthly, pp. 101-108 (Jul. 1947).
Lee, "Intercommunicating Cells, Basis for a Distributed Logic Computer," Proc. FJCC, pp. 130-136 (1962).
Lee et al., "A Content Addressable Distributed Logic Memory with Applications to Information Retrieval," Proceedings of the IEEE, vol. 51, pp. 924-932 (Jun. 1963).
Crane et al., "Bulk Processing in Distributed Logic Memory," IEEETC, vol. EC-14, pp. 186-196 (Apr. 1965).
Slotnick, "Logic Per Track Devices," Advances in Computers, pp. 291-296 (1971).
Batcher, "The Flip Network in Staran," Proc. 1976 Int. Conf. on Parallel Processing, pp. 65-71 (Aug. 1976).
Lipovski, "Architectural Featues of CASSM: A Context Addressed Segment Sequential Memory," Proceedings of the 5.sup.th ISCA, pp. 31-38 (Apr. 3-5, 1978).
Bray et al., "Data Base Computers," pp. 106-120 (D.C. Heath & Co. 1979).
Hollaar, "Text Retrieval Computers," Computer, vol. 12, No. 3, pp. 40-52 (1979).
Fuchs et al., "Developing Pixel-Planes, A Smart Memory-Based Raster Graphics System," 1982 Conference on Advanced Research in VLSI, pp. 371-380 (MIT Jan. 27, 1982).
"Graphics Interface '82," pp. 375-380 (1982, author and source unknown).
Clark, "The Geometry Engine: A VLSI Geometry System for Graphics," Computer Graphics, pp. 127-133 (vol. 16, No. 3, Jul. 1982).
IC Memories Data Book, pp. 356-363 (Hitachi Mar. 1987).
Hodges et al., "Semiconductor Memories," Analysis and Design of Digital Integrated Circuits, Sec. 9.3, pp. 372-380 (McGraw-Hill, 2.sup.nd ed. 1988).
Lineback, "SEEQ's 512-KBIT Flash EEPROMs Support In-System Programming on 12-v Supply" (1988).
Akeley, et al., "High-Performance Polygon Rendering," Computer Graphics, pp. 239-246 (vol. 22, No. 4, Aug. 1988).
Deering, et al., "The Triangle Processor and Normal Vector Shader: A VLSI System for High Performance Graphics," Computer Graphics, pp. 21-30 (vol. 22, No. 4, Aug. 1988).
Gharachorloo et al., "Subnanosecond Pixel Rendering with Million Transistor Chips," Computer Graphics, pp. 41-49 (vol. 22, No. 4, Aug. 1, 1988).
Johnson, "Design and Analysis of Fault-Tolerant Digital Systems," pp. 63-65 (Addison-Wesley 1989).
Robinson, "Chameleon: A Pattern Matching Memory System," Technical Report HPL-SAL-89-24 (Hewlett Packard Co. Apr. 19, 1989).
Akeley, "Superworkstation, The Silicon Graphics 4D/240GTX Superworkstation," IEEE Computer Graphics & Applications, pp. 71-83 (Jul. 1989).
Fuchs, et al. "Pixel-Plantes 5: A Heterogeneous Multiprocessor Graphics System Using Processor-Enhanced Memories," Computer Graphics, pp. 79-88 (vol. 23, No. 3, Jul. 1989).
Grimes, "The Intel i860 64-Bit Processor: A General-Purpose CPU with 3D Graphics Capabilities," IEEE Computer Graphics & Applications, pp. 85-88 (Jul. 1989).
Potmesil et al., "The Pixel Machine: A Parallel Image Computer," Computer Graphics, pp. 69-78 (vol 23, No. 3, Jul. 1989).
Kirk, et al., "The Rendering Architecture of the DN10000VS," Computer Graphics, pp. 299-307 (vol. 24, No. 4, Aug. 1990).
Lipovski, G.J., "A Four Megabit Dynamic Systolic Associative Memory Chip,"Dept. of Elec. and Computer Engr., Univ. of Texas, Austin, Texas (Sept. 4, 1990).
Thompson, Karl Kelvin, "Ray Tracing with Amalgams," Dissertation, University of Texas at Austin (May 1991).
Loveria, "New 3D Graphics Engines Give PCS Workstation Power," BYTE, pp. 313-318 (Nov. 1991).
Molnar, et al., "Pixel Flow: High-Speed Rendering Using Image Composition," Computer Graphics, pp. 231-240 (vol. 26, No. 2, Jul. 1992).
Britton Howard
Linden Technology Limited
LandOfFree
Apparatus and method for determining video encoding motion compe does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for determining video encoding motion compe, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for determining video encoding motion compe will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2072659