Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2002-06-11
2004-12-28
Zarneke, David (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S760020
Reexamination Certificate
active
06836134
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to techniques for measuring leakage current between two adjacent semiconductor layers of an integrated circuit, and more specifically to techniques for determining leakage current between a first semiconductor layer and a second semiconductor layer to be subsequently formed therein as a function of measured minority carrier lifetimes in the first semiconductor layer.
BACKGROUND OF THE INVENTION
Semiconductor devices, particularly power devices, are often fabricated to operate as switches. As a switch, such a semiconductor device should pass current when turned “on” and should block current when turned “off.” In the “off” state, however, some low level of leakage current is unavoidable, although many applications require such leakage current to be maintained below very low leakage current thresholds under a wide variety of operating conditions.
Leakage current in semiconductor devices is a function, at least in part, of the cleanliness of the semiconductor materials used, and may accordingly be affected by semiconductor bulk and interface defects, material contamination, and the like. Typically, wafers are processed through the entire fabrication cycle before the cleanliness level of the wafer is ascertained. This practice results in a potentially large amount of value being added to “dirty” wafers which will be scrapped after reaching final wafer test. This practice also creates uncertainty about the inventory of wafers being processed, as the fabrication line could have several weeks of bad material in process before a leakage current problem is discovered.
The present invention is directed to an apparatus and method for determining leakage current between a first semiconductor region and a second semiconductor region to be subsequently formed within the first semiconductor region. One application of such an apparatus and method is in a semiconductor wafer fabrication process to determine leakage between an epitaxial region or the like and other semiconductor regions to be subsequently diffused or implanted therein, so that dirty wafers may be scrapped before investing further fabrication costs. Other applications will occur to those skilled in the art, and any such other applications are intended to fall within the scope of the present invention.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, a method of determining leakage current between a first semiconductor region and a second semiconductor region to be subsequently formed therein comprises the steps of correlating surface minority carrier lifetime in the first semiconductor region to leakage current between the first and second semiconductor regions, based on the correlation between surface minority carrier lifetime and leakage current, establishing a surface minority carrier lifetime threshold, measuring surface minority carrier lifetime in the first semiconductor region, and determining that the leakage current between the first and second semiconductor regions is acceptable if the measured surface minority carrier lifetime is greater than the surface minority carrier lifetime threshold.
In accordance with another aspect of the present invention, a method of determining leakage current between a first semiconductor region and a second semiconductor region to be subsequently formed therein comprises the steps of establishing a leakage current threshold, correlating surface minority carrier lifetime in the first semiconductor region to leakage current between the first and second semiconductor regions, measuring surface minority carrier lifetime in the first semiconductor region, based on the correlation between surface minority carrier lifetime and leakage current, converting the measured surface minority carrier lifetime to a measured leakage current; and determining that the leakage current between the first and second semiconductor regions is acceptable if the measured leakage current is less than the leakage current threshold.
In accordance with a further aspect of the present invention, an apparatus for determining leakage current between a first semiconductor region and a second semiconductor region to be subsequently formed therein comprises a memory having stored therein a surface minority carrier lifetime threshold based on a correlation between surface minority carrier lifetime in the first semiconductor region and leakage current between the first and second semiconductor regions, a probe configured to interface with the first semiconductor region and produce one or more signals relating to surface minority carrier lifetime therein, and a computer responsive to the one or more signals to determine a measured surface minority carrier lifetime in the first semiconductor region, the computer determining that the leakage current between the first and second semiconductor regions is acceptable if the measured surface minority carrier lifetime is greater than the surface minority carrier lifetime threshold and otherwise determining that the leakage current is unacceptable.
In accordance with a further aspect of the present invention, an apparatus for determining leakage current between a first semiconductor region and a second semiconductor region to be subsequently formed therein comprises a memory having stored therein a leakage current threshold and a correlation between surface minority carrier lifetime in the first semiconductor region and leakage current between the first and second semiconductor regions, a probe configured to interface with the first semiconductor region and produce one or more signals relating to surface minority carrier lifetime therein and a computer responsive to the one or more signals to determine a measured surface minority carrier lifetime in the first semiconductor region and to convert the measured surface minority carrier lifetime to a measured leakage current based on the correlation therebetween, the computer determining that the leakage current between the first and second semiconductor regions is acceptable if the measured leakage current is less than the leakage current threshold and otherwise determining that the leakage current is unacceptable.
One object of the present invention is to determine leakage current between a first semiconductor region and a second semiconductor region to be subsequently formed within the first semiconductor region.
Another object of the present invention is to determine whether the leakage current between the two semiconductor regions is below an acceptable leakage current threshold.
A further object of the present invention is to determine leakage current between a first semiconductor region and a second semiconductor region to be subsequently formed within the first semiconductor region based on a measurement of surface minority carrier lifetime within the first semiconductor region.
These and other objects of the present invention will become more apparent from the following description of the preferred embodiment.
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Dahlgnist Dean M.
Fruth John R.
Sidner Diane W.
Chmielewski Stefan V.
Delphi Technologies Inc.
Hollington Jermele M.
Zarneke David
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