Electricity: motive power systems – Switched reluctance motor commutation control
Reexamination Certificate
1999-11-04
2001-06-19
Nappi, Robert E. (Department: 2837)
Electricity: motive power systems
Switched reluctance motor commutation control
C318S132000, C318S434000
Reexamination Certificate
active
06249096
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a brushless direct current (BLDC) motor. More specifically, the present invention relates to an apparatus and method for determining a commutation time of a sensorless BLDC motor.
(b) Description of the Related Art
A BLDC motor driving circuit can effectively drive a motor when a continuous rotating magnetic field of the BLDC motor is formed. In order to form the continuous rotating magnetic field, commutation of each phase must be performed at a proper time. In order to perform a proper commutation, the position of the rotor must be detected. Therefore, devices to detect the rotor are needed, and the devices to detect the position of the rotor include Hall sensors and resolvers. However, when Hall sensors or resolvers are used, the circuit becomes complicated. Hence, in order to ameliorate the inconveniences caused by the addition of Hall sensors, a sensorless BLDC motor has been developed.
The sensorless BLDC detects the position of the rotor using the back electromotive force (BEMF) caused by rotation of the motor.
A proper commutation time of the sensorless BLDC motor will be described.
When the BLDC motor has a large BEMF, the torque of the motor becomes great. Therefore, in order to most effectively drive the motor, a current must be supplied to a coil of a phase having the greatest BEMF. Hence, commutation must be performed at a point delayed by about 30° from a zero cross point of the BEMF distribution curve of each phase in a three phase BLDC motor.
Therefore, it is important to detect the point delayed by 30° from the zero cross point of the BEMF distribution curve in the sensorless BLDC motor so as to effectively drive the motor.
In a conventional method, an R-C combination circuit is used to detect this commutation point.
A conventional apparatus for detecting the commutation point will now be described.
FIG. 1
is a schematic diagram of a conventional apparatus for detecting the commutation point. FIGS.
2
(
a
) and (
b
) are graphs representing the operations for detecting the commutation point with the apparatus of FIG.
1
.
As represented in
FIG. 1
, a resistor R and a capacitor C are coupled to a stator coil of a phase of the motor in the conventional commutation point detecting apparatus. The voltage at the capacitor C is supplied to a positive terminal of a comparator COMP
1
, and the voltage at a neutral point is supplied to a negative terminal of the comparator COMP
1
.
As can be inferred from the drawing, the phase of the voltage that the capacitor C supplies to the positive terminal of the comparator COMP
1
is delayed compared to the phase voltage of the motor because of the capacitance of capacitor C. When the values of the capacitance of capacitor C and the resistance of resistor R are adjusted, the time at which the voltage at the capacitor C reaches the voltage of the neutral point can be used as the time to perform commutation. This method is advantageous when the rapid changes of the motor phase voltage causes the capacitor terminal voltage to also follow identical changing patterns. However, since the conventional commutation time detecting apparatus has fixed values of the resistance of resistor R and of the capacitance of capacitor C, an accurate commutation time cannot be determined except for a specific rotation speed.
In order to overcome this problem, values of the resistor and the capacitor appropriate to the rotation speed in a uniform speed drive mode are used. However, when the rotation speed is changed, as in the case of acceleration, efficiency is reduced and use of power is increased, so that the time to reach the uniform speed is increased.
SUMMARY OF THE INVENTION
It is an object of the present invention to implement an apparatus for determining the accurate commutation time for a three phase BLDC motor using a digital circuit even though the rotation speed of the motor changes.
In one aspect of the present invention, the apparatus for determining commutation time of a three phase BLDC motor comprises a commutation controlling pulse generation unit receiving a phase voltage of each phase and generating a commutation controlling pulse to determine a commutation time of each phase of the motor; a first counter receiving a first commutation controlling pulse output from the commutation controlling pulse generator and counting the period of the commutation controlling pulses; a memory storing one half of the counted values of the first commutation controlling pulses counted by the first counter; a first comparator comparing a counted value of the period of a commutation controlling pulse provided after the first commutation controlling pulse counted by the first counter with one half of the counted values of the first commutation controlling pulses stored in the memory; and an output controller receiving the comparison result of the first comparator and outputting a switching signal to control commutation of each phase of the motor.
The apparatus further comprises a second counter receiving the switching signal and counting the period of the switching signal; and a second comparator receiving and comparing one half of the counted values stored in the memory and the counting numbers of the second counter and outputting the comparison result to the output controller.
The commutation controlling pulse generation unit comprises a reference pulse generator receiving phase voltages of each phase of the motor and voltage of a neutral point, and outputting a reference pulse having a uniform period; and a commutation controlling pulse generator receiving the reference pulse of the reference pulse generator, switching signal, and switching noise removing signal of the output controller, and outputting a commutation controlling pulse generating a gate pulse type output each time a logic value of the reference pulse is changed.
The output controller comprises an enable signal generator receiving the commutation controlling pulse and, when the period of the commutation controlling pulse is constant, outputting an enable signal to output the switching signal; an excess counting preventer receiving counted binary values of the first counter and, when the counting binary values exceeds the capacity of the counter, stopping the operation of the first counter; a pre-switching noise removing signal generator receiving the commutation controlling pulse, switching signal and the counted binary value of the second compartor, and generating a pre-switching noise removing signal for generating switching noise removing signals to remove switching noises; a switching noise removing signal generator receiving the pre-switching noise removing signal from the pre-switching noise removing signal generator and counted binary value of the first counter, and removing switching noises generated by switching operations; a pre-switching signal generator receiving an output of the first comparator and outputting a pre-switching signal for generating switching signals; and a switching signal generator receiving the output binary values of the first counter and the pre-switching signal, and outputting a switching signal for performing commutation of each phase of the motor.
In another aspect of the present invention, a method for determining a commutation time of a three phase BLDC motor comprises the steps of receiving variations of the BEMF of each phase of the motor and generating commutation controlling pulses for determining a commutation time; counting the period of the commutation controlling pulses; storing one half of the counted values of the counted commutation controlling pulses in a memory; counting a period of the commutation controlling pulses provided after the counted commutation controlling pulses; comparing the counted number of the commutation controlling pulses input during the counting operation with the value stored in the memory; and generating a switching pulse to perform commutation of each phase of the motor when the comparison results are identical.
The meth
Blakely & Sokoloff, Taylor & Zafman
Fairchild Korea Semiconductor Ltd.
Leykin Rita
Nappi Robert E.
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