Apparatus and method for determining a number of digits leading

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

36471504, G06F 700, G06F 1500

Patent

active

055746705

ABSTRACT:
When a data input signal having R plus X groups of M digits is received, the digits are segmented such that X different first counter-detectors receive M digits and a second counter-detector receives the R digits. The counter-detectors determine a number of most significant count digits leading a most significant non-count digit and detect the presence of a non-count digit. A decoder receives the outputs of the first counter-detectors and, responsive to a non-count digit detection in a most significant group of M digits having a non-count digit, communicates the corresponding count number to a concatenator. A third counter-detector determines and communicates a number of most significant groups of M digits having no non-count digits. An output of the third counter detector is concatenated with an output of the decoder where the decoder output is represented by Z digits where M=N.sup.Z (X, M, R, N, and Z are non-negative integers). The concatenation represents the number of leading count digits. If R is non-zero, the second counter-detector determines a number of most significant count digits leading a most significant non-count digit and detects the presence of a non-count digit in the R most significant bits. An adder then adds R to the concatenation. A multiplexer selects the number of leading count digits in the R bits if the R bits contain a non-count digit else the multiplexer selects the concatenation plus R.

REFERENCES:
patent: 4161784 (1979-07-01), Cushing et al.
patent: 4631696 (1986-12-01), Sakamoto
patent: 4789956 (1988-12-01), Hildebrandt
patent: 4928223 (1990-05-01), Dao et al.
patent: 5053631 (1991-10-01), Perlman et al.
patent: 5058048 (1991-10-01), Gupta et al.
patent: 5128888 (1992-07-01), Tamura et al.
R. M. Tomasulo, An Efficient Alforithn for Exploiting Multiple Arithmetic Units, Part 2, Regions of Computer Space, Section 3 Concurrency: Single-Processor System (IBM Journal;, vol. 11, Jan. 1967), pp. 293-305.
R. M. Tomasulo, An Efficient Algorithm for Exploiting Multiple Arithmetic Units, IBM Journal of Research and Development, Jan. 1967, vol. 11, pp. 25-32.
Vojin G. Oklobdzija, An Algorithmic and Novel Design of a Leading Zero Detector Circuit: Comparison with Logic Synthesis, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Mar. 2, 1994, pp. 124-128.
IEEE Standard for Binary Floating-Point Arithmetic, ANSI/IEEE Std. 754-1985 .COPYRGT.1985, pp. 7-17.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Apparatus and method for determining a number of digits leading does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus and method for determining a number of digits leading , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for determining a number of digits leading will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-568340

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.