Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal
Patent
1995-07-28
1997-08-26
Chin, Stephen
Pulse or digital communications
Synchronizers
Frequency or phase control using synchronizing signal
375342, 364715H, 371 691, H04L 700
Patent
active
056617631
ABSTRACT:
A programmable digital bit pattern detector detects the presence of a variable length, variable content M-bit serial bit pattern that is sequentially repeated in a digital bit stream during some prescribed time constraint, and indicates whether successive repetitions of the pattern satisfy a prescribed criterion, before declaring that the pattern has been successfully acquired. For this purpose, a variable length shift register is programmed with a copy of the pattern. During initial acquisition, in response to a match between a respective bit of the digital bit stream and the content of a selected stage of the shift register, the contents of the shift register are shifted by one bit stage; in response to a mismatch, clocking of the shift register is inhibited for that bit. Count signals are generated in association with successive pluralities of the M bits of the digital bit stream, and an "up/down" counter is incremented or decremented by the count signals, in accordance with whether successive bits of the digital bit stream match the copy of the bit pattern being clocked through the shift register. A maximum pattern match code representative of a prescribed bit error rate and time interval is programmed into a comparator and is compared with the contents of the "up/down" counter. The comparator generates a `pattern acquired` output, in response to the value of the "up/down" counter reaching the value of the maximum pattern match code.
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Adtran Inc.
Chin Stephen
Le Amanda T.
Wands Charles E.
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