Apparatus and method for detecting out-of-lock condition in a ph

Details Apparatus and method for detecting out-of-lock condition in a ph Apparatus and method for detecting out-of-lock condition in a ph

1990-11-27

1992-10-27

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328110, 307527, 307528, 307234, 307471, 331 1A, 331 27, H03K 522, G06F 750

Patent

active

051592797

ABSTRACT:
A circuit is provided for detecting out-of-lock condition in a phase lock loop. The phase lock loop receives a first signal having a first frequency and a voltage controlled oscillator of the phase lock loop produces a second signal having a second frequency. The circuit comprises a first data flip-flop coupled to the phase lock loop for receiving the first signal and clocked by the second signal. The first flip-flop produces an inverted output of the first signal. A second flip-flop is coupled to the phase lock loop for receiving the second signal clocked by the first signal, and produces a non-inverted output of the second signal. Additionally, an EXCLUSIVE-OR gate is coupled to the first and second flip-flops for receiving the inverted and non-inverted output thereof and producing a signal indicative of an out-of-lock condition.

REFERENCES:
patent: 4267514 (1981-05-01), Kinsey
patent: 4385395 (1983-05-01), Tanaka et al.
patent: 4400667 (1983-08-01), Belkin
patent: 4422176 (1983-12-01), Summers
patent: 4535459 (1985-08-01), Hogge, Jr.
patent: 4574243 (1986-03-01), Levine
patent: 4668917 (1987-05-01), Levine
patent: 4775840 (1988-10-01), Ohmori et al.
patent: 4988901 (1991-01-01), Kamuro et al.
patent: 5027085 (1991-06-01), De Vito

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