Apparatus and method for demultiplexing a frequency division...

Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via frequency channels

Reexamination Certificate

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C370S484000, C375S350000

Reexamination Certificate

active

06493358

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to telecommunication field, and more particularly to apparatus and method for demultiplexing a frequency division multiplexed signal using a polyphase digital filter network.
2. Description of Prior Art
The use of satellites with multiple spot beam is a major step in increasing the capabilities of satellite communication. Multiple beam satellites have the advantage of having high gain and allowing the reuse of the same frequency band in geographically separated beams. The use of multiple spot beams requires additional switching on-board the satellite. This switching can be done either in the RF, IF or the baseband. Switching at the RF and IF necessitates the use of Time Division Multiple Access (TDMA) in the uplink which could lead to high rate modems in the earth stations, therefore increasing the cost of earth stations. On-board switching in the baseband requires down-conversion, demultiplexing and demodulation of the uplink data prior to switching and remultiplexing, remodulation and upconversion after switching to form the downlink. The part of the signal processing in the baseband is called On-board Baseband Processing (OBP). The use of the OBP results in a considerable flexibility in the choice of the access scheme and either TDMA or Frequency Division Multiple Access (FDMA) can be used. For the payloads with OBP, the use of FDMA is considered on the uplink to reduce ground station cost. On the other hand, Time Division Multiplexing (TDM) is used for its power efficiency on the downlink.
Moreover, use of FDMA on the uplink reduces the size of the earth terminal as compared to TDMA. However, the price paid is the increased complexity of the spacecraft payload. While a single demodulator is sufficient for demodulation of high bit rate TDMA on the uplink, several demodulators are required for the demodulation of the FDMA carriers received by the satellite. A solution to this problem is the use of a multi-carrier demodulator, referred to as a group demultiplexer/demodulator. Group demultiplexing is needed, for example, in the digital signal processing payloads if the uplink uses FDMA or some other type of spectrum sharing such as MF-TDMA or MF-CDMA. The more important and computational intensive section, referred to as the group demultiplexer, divides the incoming composite spectrum into separate channels. The second section, the demodulator, recovers the digital data for each individual channel.
There are several techniques for the group demultiplexer design. A straightforward method is per-channel filtering. In this method, a separate filter is used for each channel. This is only feasible for a small number of channels. For a large number of channel, sharp filters with many taps are required. Another method is the FFT/IFFT or frequency-domain filtering. In this method, a Fast Fourier Transform (FFT) is used to find the frequency spectrum of the composite FDM signal. Following the FFT, the frequency-domain coefficients are multiplied by coefficients of a filter in order to determine the frequency-domain samples falling into each of the carrier channels. For each set of frequency-domain coefficients, an Inverse FFT (IFFT) is used to recover the time-domain samples of the modulated carriers. This method is much less complex than the per-channel approach, while having a great degree of flexibility.
Another method for the implementation of the group demultiplexer is the polyphase/FFT method. In this method, a digital filter bank is implemented in cascade with an DFT processor, and preferably a FFT processor to provide better efficiency. This technique can be used when the bandwidths of the channels are equal and fixed.
FIG. 1
is a block diagram of a polyphase/FFT group demultiplexer according to the prior art and generally designated at
10
. Input Y(z) at
12
,
12
′ and outputs X
k
(z
N
) at
14
,
14
′ with k=0, . . . , N−1, are in complex sampled form, as well known in the art, with solid lines
12
,
14
representing the In-phase (or I) and dotted lines
14
,
14
′ representing the Quadrature-phase (or Q) components of different signals. The notation used for the representation of the signals and delay elements is in the Z-domain. The elements specified by Z
−k
in
FIG. 1
represent a delay of rT, normally implemented using shift registers of length r. That is, if the input to Z
−k
is a sample of a time signal u(t) at time kT, denoted by u[n], its output will be a sample of the signal u(t) at time nT−kT, denoted by u[n−k], where T is the time duration between two consecutive samples. The symbol Y(z) represents the Z-transform of a composite signal y[n] consisting of N frequency multiplexed signals represented as follows:
Y

(
z
)
=

n
=
-

+


y

[
n
]

z
-
n
(
1
)
The outputs X
i
(z
N
), i=0,1, . . . , N−1 represent the N individual signals after demultiplexing. The Z-transform being represented as a function of Z
N
rather than z represents a decimation of the outputs by N, i.e., only every Nth sample of x
i
[n] is retained. This is consistent with the Nyquist sampling theorem, relating the number of samples required for discrete representation of a signal to its bandwidth. That is, since the bandwidth of each of the N individual channels is 1/Nth of the total bandwidth occupied by the composite signal y(t), to represent each of these individual signals, we need only to have 1/Nth of the samples required for perfect reconstruction of y(t).
The digital filter network
15
comprises a filter bank
16
shown in
FIG. 1
consisting of sub-filters H
i
(z
N
), i=0,1, . . . , N−1, designated at
17
, which is derived from a single prototype Finite Impulse Response (FIR) filter, H(z), through a decimation by N. That is, each sub-filter H
i
(Z
N
) consists of 1/Nth of the coefficients of H(z). Denoting the coefficients of the prototype filter by h
i
, i=0,1, . . . , NL−1, the coefficients of the sub-filter, H
0
(z
N
), are h
0
, h
N
, h
2N
, . . . , h
N(L−
1), and the coefficients of the sub-filter, H
1
(z
N
), are h
1
, h
N+1
, h
2N+1
, . . . , h
N(L−1)+1
. In general, the coefficients of the ith sub-filter, H
i
(z
N
), are h
i
, h
N+i
, h
2N+i
, . . . , h
N(L−1)+i
. The derivation of the sub-filters from the prototype filter is based on the following factorization:
H

(
z
)
=

n
=
0
NL
-
1

h
n

z
-
n
=

i
=
0
N
-
1

z
-
i


k
=
0
L
-
1

h
kN
+
i

z
-
kN
=

i
=
0
N
-
1

z
-
i

H
i

(
z
N
)
.
(
2
)
The switches
18
,
18
′ at the input of the sub-filters
17
close every N samples connecting the outputs of the shift registers
20
to different sub-filters. That is, each sub-filter operates at a rate which is 1/Nth that of the sample rate of the input signal, y[n]. Multiplication of output signals A
i
(n) by w
i
, i=0,1, . . . , N−1 generated at outputs
19
,
19
′, where w=e
−i&pgr;/N
is performed by a set of N multipliers
22
and results in a phase shift of i&pgr;/N to produce filtered output signals A*
i
(n) at outputs
21
,
21
′, from which the FFT processor
23
finds the Discrete Fourier Transform (DFT) as defined by:
B
k
=

i
=
0
N
-
1

A
i


j

2

π
N

ik
(
3
)
Finally, the alternate samples of each of the N outputs
25
,
25
′ of the FFT processor are inverted by the multipliers
24
to produce demultiplexed output signals X
k
(Z
N
) at outputs
14
,
14
′.
From the foregoing, it can be seen that the number of multipliers required for the implementation of the polyphase filter network is NL, which correspond to coefficients h
0
, h
1
, h
2
, . . . , h
NL−1
of the prototype filter. Such a number of multipliers may represents a limiting factor in the context of payload optimization especially where a high number

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