Apparatus and method for delay matching of full and divided...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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C327S258000, C327S309000

Reexamination Certificate

active

06906564

ABSTRACT:
A transition delay matching circuit in which the transition delay of the divided clock signal is substantially the same as the transition delay of the reference clock signal. The transition delay of the divided clock signal is adjusted by reducing the steady state amplitude of the divided clock signal. Apparatuses and methods for matching the transition delays of the divided clock signal and the reference clock signal are disclosed.

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Copy of European Search Report for European Appln. 00256374.6 mailed Jan. 4, 2005, 3 pages.
Copy of Japanese Abstract for Japanese Appln. JP 64 002417 A, application dated Jan. 6, 1989.

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