Apparatus and method for decoding fixed and variable length enco

Details Apparatus and method for decoding fixed and variable length enco Apparatus and method for decoding fixed and variable length enco

1992-12-11

1995-09-19

Brinich, Stephen

Facsimile and static presentation processing

Facsimile

Reduced time or bandwidth for static image communication

H04N 141

Patent

active

054521017

ABSTRACT:
Single-instruction multiple-data is a new class of integrated video signal processors especially suited for real-time processing of two-dimensional images. The single-instruction, multiple-data architecture is adopted to exploit the high degree of parallelism inherent in many video signal processing algorithms. Features have been added to the architecture which support conditional execution and sequencing--an inherent limitation of traditional single-instruction multiple-data machines. A separate transfer engine offloads transaction processing from the execution core, allowing balancing of input/output and compute resources--a critical factor in optimizing performance for video processing. These features, coupled with a scalable architecture allow a united programming model and application driven performance.

REFERENCES:
patent: 4800441 (1989-01-01), Sato
patent: 4937681 (1990-06-01), Fujinawa et al.
patent: 5216518 (1993-06-01), Yamagami

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