Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2008-02-26
2009-06-30
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S233100, C365S189110, C365S189120
Reexamination Certificate
active
07554877
ABSTRACT:
An data output circuit for outputting a data stored in a core of a semiconductor memory device includes a clock generator for generating a rising clock and a falling clock by using an external clock, a clock repeater for outputting the rising clock and the falling clock as one of a high voltage clock and a low voltage clock in response to an external voltage level check signal, a level shifter for outputting a high voltage data generated by shifting the data synchronized with the high voltage clock, a data carrier for outputting a low voltage data synchronized with the low voltage clock, and a data repeater for outputting one of the high voltage data and the low voltage data in response to the external voltage level check signal.
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Taiwanese Office Action issued in Taiwanese Patent Application No. TW 094123620, mailed May 4, 2007.
Jeong Bong-Hwa
Kang Tae-Jin
Hynix / Semiconductor Inc.
Le Toan
Mannava & Kang P.C.
Nguyen Van-Thu
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