Apparatus and method for coupling a multi-lead output bus to int

Details Apparatus and method for coupling a multi-lead output bus to int Apparatus and method for coupling a multi-lead output bus to int

1989-12-28

1994-02-15

Dixon, Joseph L.

Boots, shoes, and leggings

364DIG1, 395164, G06F 1200

Patent

active

052874702

ABSTRACT:
A circuit and method of operation for controlling block-write operations to interleaved memories is disclosed which includes first and second interleave banks of memories, each memory addressable in a normal mode in a block-write mode. Each memory has a plurality of input nodes for receiving data in a normal mode, ones of the input nodes operable to receive data in the block-write mode and other ones of said input nodes not used in the block-write mode. Coupling circuitry couples leads from an output bus to input nodes of the first bank memories which are operable to receive data in the block-write mode and to input nodes in the second bank of memories which are not used in the block-write mode.

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patent: 4254463 (1981-03-01), Busby et al.
patent: 4807189 (1989-02-01), Pinkham et al.
patent: 4823286 (1989-04-01), Lumelsky et al.
patent: 4845640 (1989-07-01), Ballard et al.
patent: 4958303 (1990-09-01), Assarpour et al.

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