Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-04-01
2003-10-21
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S706000, C438S707000, C438S710000, C438S714000, C118S728000, C118S069000, C156S345530
Reexamination Certificate
active
06635580
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to an apparatus for controlling wafer temperature in a plasma etcher and a method for using such apparatus and more particularly, relates to an apparatus for controlling wafer temperature in a plasma etcher during a plasma-on state which includes a temperature sensor for sensing the wafer temperature and a flow control valve for increasing or decreasing helium flow rate in a helium cooling loop and a method for using such apparatus.
BACKGROUND OF THE INVENTION
In the fabrication of modem integrated circuit devices, one of the key requirements is the ability to construct plugs or interconnects in reduced dimensions such that they may be used in a multi-level metalization structure. The numerous processing steps involved require the formation of via holes for the plug or interconnect in a dimension of 0.5 &mgr;m or less for use in high-density logic devices. For instance, in forming tungsten plugs by a chemical vapor deposition method, via holes in such small dimensions must be formed by etching through layers of oxide and spin-on-glass materials at a high etch rate. A high-density plasma etching process. utilizing a fluorine chemistry is frequently used in the via formation process.
The via hole formation process can be enhanced by improving the etch directionality by a mechanism known as sidewall passivation to improve the anisotropy of the etching process. By utilizing a suitable etchant gas and reactor parameters, an etch-inhibiting film, normally of a polymeric nature, can be formed on vertical sidewalls. The etch-inhibiting film or the polymeric film slows down or completely stops any possible lateral etching of horizontal surfaces in the via hole. For instance, when a fluorine-containing etchant gas such as CFH
3
is used, a fluorine-type polymeric film is formed on the sidewalls. Many photoresist materials may also contribute to the formation of a polymeric film on the sidewalls. After the sidewall is coated with a polymeric film, it is protected by the inhibitor film to preserve the line width or via hole diameter control.
In a modem etch chamber, an electrostatic wafer holding device, i.e., an electrostatic chuck or commonly known as an E-chuck, is frequently used in which the chuck electrostatically attracts and holds a wafer that is positioned on top. The E-chuck holding method is highly desirable in the vacuun handling and processing of wafers. In contrast to a conventional method of holding wafers by mechanical clamping means where only slow movement is allowed during wafer handling, an E-chuck device can hold and move wafers with a force equivalent to several tens of Torr pressure.
In an etch chamber equipped with a plasma generating device and an electrostatic chuck for holding a wafer, a shadow ring is utilized as a seal around the peripheral edge of the wafer. The shadow ring, sometimes known as a focus ring, is utilized for achieving a more uniform plasma distribution over the entire surface of the wafer and to help restrict the distribution of the plasma cloud to stay only on the wafer surface area. The uniform distribution function is further enhanced by a RF bias voltage applied on the wafer during a plasma etching process. Another function served by the shadow ring is sealing at the wafer level the upper compartment of the etch chamber which contains the plasma from the lower compartment of the etch chamber which contains various mechanical components for controlling the E-chuck. This is an important function since it prevents the plasma from attacking the hardware components contained in the lower compartment of the etch chamber. In order to survive the high temperature and the hostile environment, the shadow ring is frequently constructed of a ceramic material such as quartz.
A typical inductively coupled plasma etch chamber
10
is shown in FIG.
1
. In the etch chamber
10
, which is similar to a Lam TCP etcher made by the Lam Research Corp., the plasma source is a transformer-coupled plasma source which generates high-density, low-pressure plasma
12
which is decoupled from the wafer
14
. The plasma source allows independent control of ion flux and ion energy. Plasma
12
is generated by a flat spiral coil
16
, an inductive coil, which is separated from the plasma by a dielectric plate
18
, or a dielectric window on the top of the reactor chamber
20
. The wafer
14
is positioned several skin depths away from the coil
16
so that it is not affected by the electromagnetic field generated by the coil
16
. There is very little plasma density loss because plasma
12
is generated only a few mean free paths away from the wafer surface. The Lam TCP plasma etcher therefore enables a high-density plasma and high-etch rates to be achieved. In the plasma etcher
10
, an inductive supply
22
and a bias supply
24
are used to generate the necessary plasma field. Multi-pole magnets
26
are used surrounding the plasma
12
generated. A wafer chuck
28
is used to hold the wafer
14
during the etching process. A ground
30
is provided to one end of the inductive coil
16
.
In a typical inductively coupled RF plasma etcher
10
shown in
FIG. 1
, a source frequency of 13.56 MHZ and a substrate bias frequency of 13.56 MHZ are utilized. An ion density of approximately 0.5~2×10
12
cm
3
at wafer, an electron temperature of 3.5~6 eV and a chamber pressure of 1~25 m Torr are achieved or used.
In the typical plasma etch chamber
10
, a cooling means for the wafer backside is provided in an E-chuck for controlling the wafer temperature during the plasma processing. This is shown in
FIG. 2
for the plasma etcher
40
. In the conventional plasma etcher
40
, E-chuck
42
is provided for supporting a wafer
44
thereon. E-chuck
42
can be constructed of either a metallic material or of a polymeric material. A plurality of ventilation apertures (not shown) are provided in the E-chuck surface such that a cooling gas can be supplied to the backside
46
of the wafer
44
during plasma processing. The plurality of ventilation apertures in the E-chuck
42
is connected in fluid communication with a cooling gas inlet conduit
38
for feeding a cooling gas into the apertures. The cooling gas inlet conduit
38
is in turn connected to a gas supply line
36
, a flow control valve
34
and a cooling gas supply
32
. The pressure in the cooling gas supply line
36
is monitored by a pressure sensing device
48
which in turn sends a signal
50
to a controller
52
. The controller
52
, after receiving signal
50
and comparing to a pre-stored value, sends signal
54
to the flow control valve
34
for opening or closing the valve and thus increasing or decreasing the cooling gas supply through the supply line
36
,
38
into the E-chuck
42
. The amount of the cooling gas that is supplied to the E-chuck
42
is further adjusted by a needle valve
56
and pumped away by a pump
58
.
As shown in
FIG. 2
, the conventional method for controlling the E-chuck temperature and the wafer temperature is ineffective since there is no feedback control loop for achieving an efficient control of the cooling gas pressure that flown through the E-chuck
42
. The temperature of the wafer
44
during plasma processing can not be detected and thus, the temperature can exceed a critical limit to cause a detrimental effect on the coating layers on the wafer. For instance, during a plasma etching process conducted on a dielectric layer, the wafer temperature can increase to such an extent that a photoresist layer coated on the wafer starts to flow during the plasma-on period. The lack of precise control on the wafer temperature in a plasma etcher therefore leads to severe processing difficulties and produces low yield of the wafer.
A test conducted and data obtained on an E-chuck equipped with conventional cooling apparatus is shown in Table 1.
TABLE 1
E-Chuck temperature (E)
Wafer temperature (W)
Deviation (W − E)
Metal (45° C.)
78° C.
33° C.
Poly (65° C.)
75° C.
10° C.
As shown in Table 1, the wafer positioned on th
Chen T. Y.
Yang R. Y.
Taiwan Semiconductor Manufacturing Co. Ltd.
Tung & Associates
Vockrodt Jeff
Zarabian Amir
LandOfFree
Apparatus and method for controlling wafer temperature in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for controlling wafer temperature in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for controlling wafer temperature in a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3156319