Boots – shoes – and leggings
Patent
1992-12-22
1995-11-21
Kriess, Kevin A.
Boots, shoes, and leggings
364916, 3649343, 364DIG2, G06F 104
Patent
active
054695619
ABSTRACT:
An apparatus and method for controlling the bus cycle running time of a data processing apparatus. The apparatus includes a CPU and at least one device such as a memory device, input/output device and the like which receives data from the C. A clock signal supplied to the CPU is varied based on the bus cycle or address within the device which is identified by the CPU for processing of the data. Alternatively, the frequency of the clock signal is varied based on ambient temperature and line voltage conditions. Accordingly, processing speed of the CPU can be varied to accommodate high speed memory devices and slower speed input/output devices.
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Microprocessor Bus Cycle Stretcher by J. P. Buonomo, Sr. and H. Dwyer, III, IBM Technical Disclosure Bulletin No. 3, vol. 23, Aug. 1980, p. 984.
Datum By CQ Publishing Co., Ltd. (Oct. 1985, pp. 379-383, 388-391, 1232.
Chavis John I.
Kriess Kevin A.
Seiko Epson Corporation
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