Apparatus and method for controlling the frequency at which...

Dynamic magnetic information storage or retrieval – General processing of a digital signal – Data clocking

Reexamination Certificate

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C360S046000

Reexamination Certificate

active

06222692

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
DIGITAL DATA PHASE DETECTOR, Ser. No. 08/353,553, filed Dec. 9, 1994 now U.S. Pat. No. 5,504,790, assigned to the assignee of the present application which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
The present invention is generally related to read/write channels in hard disk drives and disk drive electronic control systems. In particular, the present invention relates to controlling the frequency at which data is written onto a disk in a disk drive system.
Disk drive systems, as shown in
FIG. 1
, include a microprocessor
9
for controlling the overall operation of the disk drive system, a read channel
10
for recovering data read from the disk, a write channel
12
for writing data onto the disk and a digital phase locked loop
11
for providing a read clock to the read channel
10
and oscillator
13
operating as the write clock for the write channel
12
.
During a write operation, the phase locked loop
11
, in response to control signals from microprocessor
9
on bus
17
, locks up on a frequency determined by the frequency of reference oscillator
13
in preparation for the next read operation. Oscillator
13
provides the write clock on line
19
to write channel
12
which, in response to control signals on bus
19
from microprocessor
9
, generates write data on line
23
from the data to be written on line
22
.
The disk drive system's spindle motor (not shown) operates at a nominal speed with a speed tolerance of +/−1%. This variation in speed affects both the frequency of the data written onto the disk and the frequency of the data read from the disk. If the speed of the spindle motor increases by +1% then the data written on the disk will have a shorter wavelength than data that would have had been written with the spindle motor operating at the spindle motor's nominal speed. If the same data is read back from the disk with the spindle motor operating at the spindle motor's nominal speed, the resulting frequency of the recovered data will be 1% higher than the frequency of the write clock.
FIG. 3
shows a format of a data record as recorded on the disk. The data record is comprised of a format area comprising the servo preamble field, the address mark field, the gray code field, the servo data field, the I.D. VFO field, the I.D. sync field and the I.D. field which are written when the disk is originally formatted and a data area comprising the data VFO field, the data sync field, the data field and the error correction code (ECC) field which are written whenever a record is written by write channel
12
. The number of bytes of data in each of the above fields is shown directly below each field in FIG.
3
.
Returning to
FIG. 1
, during a read operation the data read from the disk are received by read channel
10
on line
14
and selected portions of the read data is provided on line
20
to digital phase locked loop
11
under control of control signals on bus
16
from microprocessor
9
. The phase locked loop
11
, in response to control signals on bus
17
from microprocessor
9
, locks up on a frequency determined by the frequency of the data received on line
20
from read channel
10
to generate the read clock. Read channel
10
, under control of control signals on bus
16
from microprocessor
9
, uses the read clock on line
21
to provide detected data on line
15
derived from the read data on line
20
.
Returning to
FIG. 3
, during a read operation the read gate is enabled to allow VFO data from the I.D. VFO field and the data VFO field to be provided to the phase locked loop
11
such that phase locked loop
11
will acquire at the frequency of the VFO data in the two VFO fields.
Since the two VFO fields were written at different times, the frequency of the VFO data recovered from the format VFO field can be different than the frequency of the VFO data recovered from the write VFO field.
The read gate for a write operation is shown to be activated during the I.D. field to allow the read channel
10
to ascertain if the record being sensed is the record being addressed in either a write or read operation. The write gate for a write operation is shown to be enabled during the data area of the record which includes a splice field which allows time for the disk drive system to recover from deactivating the read gate and activating the write gate during a write operation.
The number of bytes of data in the I.D. VFO field and the data VFO field is determined by the amount of time required for the phase locked loop
11
to acquire synchronization in frequency and phase with the read data in the worst case situation. The worst case situation is where the data in the data area of a record is written and read at the extremes of the speed tolerance of the spindle motor, that is to write data with the spindle motor's speed 1% fast and to read that same data with the spindle motor's speed 1% slow or vice versa. In the worst case situation the phase locked loop
11
would have to acquire a frequency that is 2% higher or lower than the write clock frequency.
SUMMARY OF THE INVENTION
Briefly, the present invention provides an apparatus and method which will cause a write clock to be generated by the phase locked loop which acquires the frequency of the data read from the I.D. VFO field, the I.D. sync field and the I.D. field for the record to be written and then maintains that acquired frequency for the write clock during the writing of the data area (the data VFO field, the data sync field, the data field and the ECC field data) into the record to be written. This results in the data being written into the data area of the record at the same frequency as the data in the format area of the record being written.
An advantage of the present invention is that data written in the data area (the data VFO field, the data sync field, the data field and the ECC field) of a record will be at the same frequency as the data read from the format area (the I.D. VFO field, the I.D. sync field and the I.D. field) of that same record during a write operation.
Another advantage of the invention is that the time required for the phase locked loop to acquire frequency and phase of the data being read during a read operation is reduced.
An advantage of the invention is the increase in speed for the phase locked loop to acquire frequency and phase lock with the data read from a data record during both a read and write operation.
Another advantage of the invention is that the length of the I.D. VFO field and the data VFO field may be shorter in length.


REFERENCES:
patent: 4736238 (1988-04-01), Moriyama et al.
patent: 5062091 (1991-10-01), Maeda et al.
patent: 5193034 (1993-03-01), Tsuyoshi et al.
patent: 5231545 (1993-07-01), Gold
patent: 5278815 (1994-01-01), Mashimo et al.
patent: 5307028 (1994-04-01), Chen
patent: 5369553 (1994-11-01), Ottesen et al.
patent: 5535067 (1996-07-01), Rooke
patent: 0 485 234 A2 (1992-05-01), None
patent: 0 586 236 A2 (1994-03-01), None
patent: 0 611 155 A2 (1994-08-01), None
patent: 0 618 574 A2 (1994-10-01), None
patent: WO 94/08394 (1994-04-01), None
IBM Technical Disclosure Bulletin, IBM Corportion, “Write Data Circuits with Sample Sector Servo”, vol. 34, No. 7A, Dec. 1991, New York, U.S.A.

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