Apparatus and method for control of asynchronous program interru

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395775, 364DIG1, 3642329, 3642809, 3642808, 3642632, 3642421, 3642412, 3642302, G06F 946, G06F 900

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051485443

ABSTRACT:
In a data procesing system having a kernel mode (i.e., for executing privileged instructions) and a user mode of operation, apparatus for responding to interrupt conditions includes a first register, subject to the control of the currently executing program for enabling the generation of a mode-related interrupt signal and includes a second register for indicating the presence of a pending mode-related interrupt condition and a third register for requesting a mode-related interrupt be entered in the second register. The mode of operation and the enable and pending interrupt condition registers are monitored and when the signals in the two registers have the appropriate relationship, an interrupt signal is generated to which a control program will respond. The contents of the first register can be controlled by the currently executing program which can control the enabling signal for the currently executing mode. The pending interrupt condition and the request registers may be accessed only from the privileged mode of operation.

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Technical Summary: VAX, Digital Equipment Corporation, 1982, Chapter 4, pp. 22-24.
R. J. Gallagher; Hardware Interrupt Structure for a Distributed Processing System; Dec. 1979; 8167 Computer Design vol. 18; pp. 15-19.

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