Apparatus and method for computer network clock recovery and jit

Details Apparatus and method for computer network clock recovery and jit Apparatus and method for computer network clock recovery and jit

1994-09-29

1997-01-07

Heckler, Thomas M.

G06F 110

Patent

active

055926584

ABSTRACT:
A unit for controlling the data output rate from a device which receives data within a range of input rates. The unit includes an indicator for indicating a level of fullness of the device, first and second clocks which operate at a first and second predetermined frequencies, an edge synchronizer for indicating whether a first pulse of the first clock and a second pulse of the second clock are phase aligned, and a switch. The switch receives output from the indicator and from the edge synchronizer, and switches between the first and second clocks in accordance with the level of fullness and provided that the first and second pulses are phase aligned.

REFERENCES:
patent: 4803703 (1989-02-01), Delvca et al.
patent: 5150068 (1992-09-01), Kawashima

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