Apparatus and method for calibration of patterned wafer scanners

Optics: measuring and testing – Standard

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356237, 356394, G01J 102, G01N 2188

Patent

active

053830180

ABSTRACT:
A calibration wafer for a patterned wafer scanner is constructed from a substrate of semiconductor material, typically silicon, in which a pattern of features has been etched into the periphery of each die by means of photolithographic techniques. Next, a layer or layers of films composed of materials which are typically used during the fabrication of integrated circuits are deposited. Then a substantially uniform distribution of particles of a known material and size distribution is deposited onto the wafer. A second embodiment of the calibration wafer is one in which a layer or layers of film are first deposited onto a substrate. Then a pattern of features is etched into the periphery of the film covering each die by means of photolithographic techniques. After this step, a substantially uniform distribution of particles is deposited. A method of using such a calibration wafer to calibrate a patterned wafer scanner is also disclosed.

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patent: 5198869 (1993-03-01), Monteverde et al.
patent: 5214486 (1993-05-01), DeWitt

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