Apparatus and method for calculating a representation of a...

Information security – Prevention of unauthorized use of data including prevention...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Other Related Categories

C708S446000, C726S034000, C713S320000

Type

Reexamination Certificate

Status

active

Patent number

07610628

Description

ABSTRACT:
An apparatus for calculating a representation of a result operand of the non-linear logical operation between a first operand and a second operand includes a first logic gate and a second logic gate. Each operand is represented by two auxiliary operands, which, when linearly combined together result in the respective operand. The first and second logic gates are designed such that an average energy consumption of the first or second logic gate is substantially equal to a plurality of combinations of auxiliary operands at the beginning of a first operation cycle and auxiliary operands at the beginning of a second operating cycle, the average energy being derivable from a plurality of different orders of occurrences of the first to fourth auxiliary operands.

REFERENCES:
patent: 6295606 (2001-09-01), Messerges et al.
patent: 7071725 (2006-07-01), Fujisaki
patent: 7132858 (2006-11-01), Bock
patent: 2005/0193052 (2005-09-01), Elbe et al.
patent: 2005/0232416 (2005-10-01), Sonnekalb et al.
patent: 2005/0257077 (2005-11-01), Dutta et al.
E. Trichina, et al.; “Small Size, Low Power, Side Channel-Immune AES Coprocessor: Design and Synthesis Results”; Proceedings of the Fourth Conference on the Advanced Encryption Standard (AES), Bonn, Germany, May 2004, pp. 113-127.
M.-L. Akkar and C. Giraud; “An Implementation of DES and AES, Secure against Some Attacks”; Cryptographic Hardware and Embedded Systems—CHES 2001, (C.K. Koc, D. Naccache, and C. Paar, Eds.), Lecture Notes in Computer Science, vol. 2162, pp. 309-318, Springer, 2001.
M.-L. Akkar, R. Bevan, L. Goubin; “Two Power Analysis Attacks against One-Mask Methods”; 11th International Workshop on Fast Software Encryption—FSE 2004, (B.K. Roy and W. Meier, Eds.); Lecture Notes in Computer Science, vol. 3017, pp. 332-347, Springer, 2004.
R. Bevan and E. Knudsen; “Ways to Enhance Differential Power Analysis”; ICISC 2002, (P.J. Lee and C.H. Lim, Eds.), Lecture Notes in Computer Science, vol. 2587, pp. 327-342, Springer, 2003.
J. Blomer, J.C. Merchan, and V. Krummel; “Provably Secure Masking of AES”; Selected Areas in Cryptography—SAC 2004, Lecture Notes in Computer Science, vol. 3357, pp. 69-83, Springer, 2004.
S. Chari, C.S. Jutla, J.R. Rao, and P. Rohatgi; “Towards Sound Approaches to Counteract Power-Analysis Attacks”; Advances in Cryptology—Crypto '99, (M.J. Wiener, Ed.), Lecture Notes in Computer Science, vol. 1666, pp. 398-412, Springer, 1999.
C. Clavier, J.-S. Coron, and N. Dabbous; “Differential Power Analysis in the Presence of Hardware Countermeasures”; Cryptographic Hardware and Embedded Systems—CHES 2000, (C.K. Koc and C. Paar Eds.), Lecture Notes in Computer Science, vol. 1965, pp. 252-263, Springer, 2000.
J.-S. Coron; “Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems”, Cryptographic Hardware and Embedded Systems—CHES 1999, (C.K. Koc and C. Paar, Eds.), Lecture Notes in Computer Science, vol. 1717, pp. 292-302, Springer, 1999.
J.D. Golic; “DeKaRT: A New Paradigm for Key-Dependent Reversible Circuits”; Cryptographic Hardware and Embedded Systems—CHES 2003, (C.D. Walter, C.K. Koc, and C. Paar, Eds.), Lecture Notes in Computer Science, vol. 2779, pp. 98-112, Springer, 2003.
J.D. Golic and R. Menicocci; “Universal Masking on Logic Gate Level”; Electronics Letters 40 (9), pp. 526-527 (2004).
J.D. Golic and C. Tymen; “Multiplicative Masking and Power Analysis of AES”; Cryptographic Hardware and Embedded Systems—CHES 2002, (B.S. Kaliski Jr., C.K.Koc, and C. Paar, Eds.), Lecture Notes in Computer Science, vol. 2535, pp. 198-212, Springer, 2003.
L. Goubin and J. Patarin; “DES and Differential Power Analysis—The Duplication Method”; Cryptographic Hardware and Embedded Systems—CHES 1999, (C.K. Koc and C. Paar, Eds.), Lecture Notes in Computer Science, vol. 1717, pp. 158-172, Springer, 1999.
Y. Ishai, A. Sahai, and D. Wagner; “Private Circuits: Securing Hardware against Probing Attacks”; Advances in Cryptology—Crypto 2003, (D. Boneh, Ed.), Lecture Notes in Computer Science, vol. 2729, pp. 463-481, Springer, 2003.
P.C. Kocher, J. Jaffe, and B. Jun; “Differential Power Analysis”; Advances in Cryptology—Crypto '99, (M.J. Wiener, Ed.), Lecture Notes in Computer Science, vol. 1666, pp. 388-397, Springer, 1999.
S. Mangard; “Hardware Countermeasures Against DPA—A Statistical Analysis of Their Effectiveness”; Topics in Cryptology—CT-RSA 2004, (T. Okamoto, Ed.), Lecture Notes in Computer Science, vol. 2964, pp. 222-235, Springer, 2004.
S. Mangard, T. Popp, B.M. Gammel; “Side-Channel Leakage of Masked CMOS Gates”; Topics in Cryptology—CT-RSA 2005, (A. Menezes, Ed.), Lecture Notes in Computer Science, vol. 3376, pp. 351-365, Springer, 2005.
T.S. Messerges; “Securing the AES Finalists Against Power Analysis Attacks”; 7th International Workshop on Fast Software Encryption—FSE 2000, (B. Schneier, Ed.), Lecture Notes in Computer Science, vol. 1978, pp. 150-164, Springer, 2001.
T.S. Messerges, E.A. Dabbish, and R.H. Sloan; “Power Analysis Attacks of Modular Exponentiation in Smartcards”; Cryptographic Hardware and Embedded Systems—CHES 1999, (C.K. Koc and C. Paar, Eds.), Lecture Notes in Computer Science, vol. 1717, pp. 144-157, Springer, 1999.
T.S. Messerges, E. A. Dabbish, and R. H. Sloan; “Examining Smart-Card Security under the Threat of Power Analysis Attacks”; IEEE Transactions on Computers, 51(5), pp. 541-552, 2002.
B. Preneel, R. Govaerts, J. Vandewalle; “Boolean Functions Satisfying Higher Order Propagation Criteria”; Advances in Cryptology—Eurocrypt '91, (D.W. Davies, Ed.), Lecture Notes in Computer Science, vol. 547, pp. 141-152, Springer, 1991.
A. Shamir; “Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies”; Cryptographic Hardware and Embedded Systems—CHES 2000, (C.K. Koc and C. Paar, Eds.), Lecture Notes in Computer Science, vol. 1965, pp. 71-77, Springer, 2000.
D. Suzuki, M. Saeki, and T. Ichikawa; “Random Switching Logic: A Countermeasure against DPA based on Transition Probability”; Cryptology ePrint Archive, Report 2004/346 (http://eprint.iacr.org/).
K. Tiri and I. Verbauwhede; “Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology”; Cryptographic Hardware and Embedded Systems—CHES 2003, (C.D. Walter, C.K. Koc, and C. Paar, Eds.), Lecture Notes in Computer Science, vol. 2779, pp. 137-151, Springer, 2003.
K. Tiri and I. Verbauwhede; “A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation”; Proc. of Design, Automation and Test in Europe Conference—Date 2004, IEEE Computer Society, pp. 246-251, 2004.
E. Trichina; “Combinational Logic Design For AES SubByte Transformation on Masked Data”; Cryptology ePrint Archive, Report 2003/236 (http://eprint.iacr.org/.).
E. Trichina, D. De Seta, and L. Germani; “Simplified Adaptive Multiplicative Masking for AES”; Cryptographic Hardware and Embedded Systems—CHES 2002, (B.S. Kaliski Jr., C.K. Koc, and C. Paar, Eds.), Lecture Notes in Computer Science, vol. 2535, pp. 187-197, Springer, 2003.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Apparatus and method for calculating a representation of a... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus and method for calculating a representation of a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for calculating a representation of a... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4104358

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.