Apparatus and method for block phase estimation

Pulse or digital communications – Receivers – Angle modulation

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375331, H03D 124, H03D 300

Patent

active

059600446

ABSTRACT:
A block phase estimator include a phase averaging circuit. A first embodiment of the phase averaging circuit includes a phase differencing circuit coupled to an averager input, a first modulo circuit coupled to the phase differencing circuit, a filter coupled to the first modulo circuit, and a summation circuit having an positive input and a negative input, the positive input being coupled to the averager input, the negative input being coupled to the filter. The phase averaging circuit further includes a second modulo circuit coupled to the summation circuit. An alternative embodiment of the phase averaging circuit includes a delay line having a plurality of taps coupled to an averager input and a plurality of first subtractor circuits, a first input of each first subtractor circuit being coupled to the averager input, a second input of each first subtractor circuit being coupled to a corresponding tap of the plurality of taps. A plurality of first modulo circuits are coupled to the plurality of first subtractor circuits, each first modulo circuit being coupled to a corresponding first subtractor circuit. A summation circuit is coupled to all first modulo circuits, and a scaling circuit is coupled to the summation circuit. The phase averaging circuit further includes a second subtractor circuit, a first input of the second subtractor circuit being coupled to the averager input, a second input of the second subtractor circuit being coupled to the scaling circuit.

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Francis D. Natali and Moe Lwin, "The Block Phase Estimator", Feb. 1993, pp. 45-53.
IEEE Transactions On Communication, vol. COM-35, No. 9, Sep. 1987, pp. 972-976.

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