Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to conductive state
Reexamination Certificate
2000-10-31
2002-12-24
Loke, Steven (Department: 2811)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to conductive state
C257S529000, C257S050000, C257S530000, C438S600000, C438S467000
Reexamination Certificate
active
06498056
ABSTRACT:
TECHNICAL FIELD
This invention relates generally to integrated circuits and more specifically to an apparatus and method for providing an antifuse.
BACKGROUND OF THE INVENTION
In integrated circuit manufacturing, it is often desirable to select particular circuits from an array. For example, a pair of redundant parallel circuits may be formed and, after testing one circuit to verify that it functions properly, the other parallel circuit may be removed. One method currently used to remove the unwanted circuit is to form programmable fuse elements (i.e., sacrificial metal lines buried in a dielectric layer) in the circuits which are normally closed, then to blow a fuse element by vaporizing the fuse element with laser energy to open the circuit that is not selected. This technique can cause rapid heating around the fuse, however, shattering the fuse cover and creating an explosive release of metal particles. This explosive release of metal particles can leave residue on the chip surface, creating the risk of contamination problems in subsequent process steps.
An alternative method is to form a normally open path, then to close the path to form an antifuse if the circuit is selected. One antifuse structure is disclosed in U.S. Pat. No. 5,793,095 issued to Harvey. Disclosed is the use of laser energy to fuse together two or more conductive terminals, through an optically transparent dielectric layer, to close a circuit (i.e., to form an antifuse). The disclosed antifuse structure requires that the conductive terminals to be fused must be located in the same metal layer. Therefore, it can not be used to form interlayer connections. In addition, the structure requires either a great deal of laser energy, which can cause damage, or that the terminals be very close, which can cause leakage current and capacitive coupling.
Another approach that incorporates antifuse structures is to apply laser or incoherent energy to damage a dielectric layer separating two conductive terminals. This approach uses a different closure mechanism than the present invention. In U.S. Pat. No. 5,811,869 issued to Seyyedy et al. and U.S. Pat. No. 5,528,072 issued to Boudou et al., laser energy is used to damage a dielectric layer to create a short between an upper conductor and a well or doped region of a substrate. Because these structure can only be formed in a substrate, they are not useful for interlevel connections and all levels above the substrate must be free of wiring above the antifuse. To create a short circuit, the terminals must be very close, which could cause leakage current and capacitive coupling absent the antifuse.
U.S. Pat. No. 5,270,251 issued to Cohen shows a method for providing a programmable link having a breakdown voltage (and consequently a programming voltage) that can be reduced by applying incoherent radiation to a composite insulator between metal layers in the link. Cohen teaches that specific limitations must be applied to the insulator formed between a bottom conductor and a top conductor, such as material and structural limitations. Cohen does not teach or suggest either a horizontal structure or laser energy. Also, Cohen forms a high-resistance link, which can adversely effect circuit performance.
U.S. Pat. Nos. 5,314,840 and 5,485,032, each issued to Schepis et al. and assigned to the assignee of the subject invention, teach a method and structure for forming a programmable antifuse comprising adjacent bodies of germanium and aluminum or aluminum alloy. The germanium is heated using resistance heating or irradiation, causing it to alloy with the aluminum and form a low-resistance connection. This method requires the use of germanium and aluminum. Also, the high energy input required to alloy the germanium and the aluminum may be detrimental to some circuits which require antifuses.
U.S. Pat. No. 4,617,723 issued to Mukai discloses a method for forming a conductive link comprising a metal layer and an undoped polysilicon insulating layer. The polysilicon is caused to react with the metal to form a conductive silicide link by applying heat with a laser beam. This process requires complex multi-poly processes and high activation temperatures.
The deficiencies of the conventional antifuse structures and of the conventional methods incorporating such structures show that a need still exists for improvement. To overcome the shortcomings of the conventional structures and methods, a new antifuse structure and a new method for closing or switching an antifuse structure are needed.
It is an object of the present invention to provide a low-resistance antifuse structure and method which do not cause contamination in subsequent processes. It is a further object of the present invention to provide a low-resistance antifuse structure and method with low-energy laser pulses and electrostatic assist which minimize energy input into the chip containing the antifuse. It is yet another object of the present invention to provide a low-resistance antifuse structure and method which are compatible with low dielectric constant (low-K) interlayer dielectrics.
SUMMARY OF THE INVENTION
To achieve these and other objects, and in view of its purposes, the present invention provides an antifuse structure and method using low-energy laser pulses and electrostatic assist to close the antifuse. In one embodiment of the present invention, two metal segments are formed having edges in close proximity. The metal segments can be embedded in material which is a poor diffusion barrier to the metal segments, such as polyimide or porous silicates for unclad copper. Alternatively, an air gap can be formed around the metal segments using a sacrificial fill technique. One or more of the metal segments is exposed to low-energy laser pulses which soften the metal segments, and a voltage potential is applied between the metal segments, causing the metal to flow and bridge the gap between the metal segments.
In another embodiment of the present invention, a first metal segment and a second metal segment are formed within an antifuse cavity filled with an interlayer dielectric, and the interlayer dielectric is removed using a process such as a wet etch. The second metal segment is exposed to low-energy laser pulses which soften the metal segment, while a voltage potential is applied between the first and second metal segments, causing the second metal segment to bend and to contact the first metal segment.
The present invention provides considerable improvement over the prior art. One advantage is that the present invention can provide a low-resistance antifuse which is closed with a minimum energy input into the chip containing the antifuse. Another advantage of the present invention is that it is compatible with new low-K dielectrics. Also, the present invention does not cause contamination in subsequent processing steps.
It should be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.
REFERENCES:
patent: 4240094 (1980-12-01), Mader
patent: 4617723 (1986-10-01), Mukai
patent: 4751197 (1988-06-01), Wills
patent: 5270251 (1993-12-01), Cohen
patent: 5314840 (1994-05-01), Schepis et al.
patent: 5485032 (1996-01-01), Schepis et al.
patent: 5528072 (1996-06-01), Boudou et al.
patent: 5793095 (1998-08-01), Harvey
patent: 5811869 (1998-09-01), Seyyedy et al.
patent: 5915171 (1999-06-01), Sheu
patent: 5936297 (1999-08-01), Jun
Motsiff William T.
Tonti William R.
Williams Richard Q.
Fraley, Esq. Lawrence R.
Kang Donghee
Loke Steven
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