Electrical computers: arithmetic processing and calculating – Electrical analog calculating computer – Particular function performed
Reexamination Certificate
1999-02-17
2002-06-18
Mai, Tan V. (Department: 2121)
Electrical computers: arithmetic processing and calculating
Electrical analog calculating computer
Particular function performed
C708S319000, C708S320000, C708S306000
Reexamination Certificate
active
06408322
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to filter design and, more particularly, to a filter design employing minimal hardware that is capable of providing robust physical filter realizations.
DESCRIPTION OF THE PRIOR ART
It is known that digitally sampling a frequency component equal to one-half the sampling frequency (referred hereinafter as the Nyquist folding frequency) results in successive sample values thereof being of the same magnitude and opposite polarity. Therefore, the algebraic sum of successive sample values of the Nyquist folding frequency is zero.
It is also known that when an ongoing time-varying input signal is first delayed for a given interval and then the delayed value thereof is subtracted from the current value thereof over this interval, the direct-current (DC) component (i.e., the zero frequency component) of the input signal will be eliminated from the resulting alternating current (AC) difference signal (i.e., all the frequency components of the difference signal are higher in frequency than zero). Further, in the case of an input signal comprising an ongoing data stream of periodically-occurring digital sample values, it is known that each sample value may be delayed for one period and then subtracted from the current sample value to thereby provide a data stream of difference values from which the zero frequency (DC) component has been eliminated. In this regard, the disclosure of U.S. Pat. No. 5,838,600, entitled “DC Gain Invariant Filter Implementation”, filed by David L. McNeely et al., and assigned to the same assignee as the present application, is incorporated by reference herein. In particular, U.S. Pat. No. 5,838,600 is directed to a filter design that is capable of ensuring a constant DC gain independent of physical filter realization errors under all input conditions with a minimal amount of hardware.
However, there are other problems which arise in the design of practical physically-realizable digital filters required for various system purposes. In particular, there are distinctions to be made between the mathematical statement of the digital filter's theoretical impulse frequency response and a physical realization of the desired filter's impulse frequency response. Engineering tradeoffs are made to reduce size, cost, and complexity of the filter in the desired application. For example, the following tradeoffs are common:
1. Multiplier coefficient values are modified to ease realization.
2. Data path numerical precision less than the full precision needed for mathematical correctness is often employed.
3. Different precisions are used in different parts of the realization as not all paths equally impact function.
4. Mixtures of truncation and rounding processes are used.
5. Simplified non-exact multiplier structures are sometimes used.
These error sources change the frequency and time response of the filter. Some changes in this response are unimportant to system function, while other changes may significantly degrade the system function under some combination of input conditions and filter state (if time varying). Therefore, there is a need for a filter design approach which mitigates degrading effects on system function caused by these error sources.
SUMMARY OF THE INVENTION
The present invention is directed to a filter design approach which mitigates problems caused by the aforesaid error sources by providing a practical physically-realizable filter structure that stabilizes the filter response at a set of one or more anchor frequencies so that the frequency response at these anchor frequencies is unaffected by these error sources. In addition, this filter structure adds degrees freedom to the design of any desired filter impulse response, which aid in the discovery of efficient physical realizations of a designed filter.
More specifically, the present invention is directed a physically-realized filter structure designed to have an impulse frequency response to an ongoing input signal having a given frequency bandwidth applied thereto that is substantially equivalent to a certain theoretical impulse frequency response, wherein the filter structure comprises a given filter that introduces realization errors into its frequency response. The deleterious effects of these realization errors is reduced by incorporating additional filters in the physically-realized filter structure, which additional filters (1) render the given filter inoperative at a set comprising at least one selected frequency within the given frequency bandwidth and (2) anchor the frequency response value of the filter structure in the neighborhood of the one selected frequency of the set substantially at the corresponding theoretical impulse frequency response value in the neighborhood of the one selected frequency of the set.
REFERENCES:
patent: 4760542 (1988-07-01), Mehrgardt et al.
patent: 4791597 (1988-12-01), Miron et al.
patent: 4852034 (1989-07-01), Takayama
patent: 5170369 (1992-12-01), Rossum
patent: 5195140 (1993-03-01), Kudo et al.
patent: 5274579 (1993-12-01), Nelson et al.
patent: 5319585 (1994-06-01), Amrany
patent: 5389923 (1995-02-01), Iwata et al.
patent: 5412638 (1995-05-01), Koulopoulos et al.
patent: 5420891 (1995-05-01), Akansu
patent: 5489879 (1996-02-01), English
patent: 5553014 (1996-09-01), DeLeón, II et al.
patent: 5610942 (1997-03-01), Chen
patent: 5621404 (1997-04-01), Heiss et al.
patent: 5838600 (1998-11-01), McNeely et al.
J. Baldwin, “Digital Standards Conversion”, Digital Video/SMPTE, 1977, vol. 1, pp. 84-93.
Knutson, et al., “An Optimal Approach to Digital Raster Mapper Design”, IEEE, May 1991, pp. 72-73.
Kurdyla Ronald H.
Laks Joseph J.
Mai Tan V.
Thomson Licensing S.A.
Tripoli Joseph S.
LandOfFree
Apparatus and method for anchoring predetermined points of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for anchoring predetermined points of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for anchoring predetermined points of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2925925