Apparatus and method for analyzing passive circuits using reduce

Details Apparatus and method for analyzing passive circuits using reduce Apparatus and method for analyzing passive circuits using reduce

1997-07-31

2000-03-21

Teska, Kevin J.

39550034, G06F 1750

Patent

active

060411708

ABSTRACT:
A method and apparatus for generating and analyzing a reduced-order model of a linear circuit. The method and apparatus generates the symmetric multi-port transfer function of an RLC circuit. The invention employs a novel symmetric block-Lanczos-type procedure, termed SyMPVL for Symmetric Matrix Pade via Lanczos, to reduce original circuit matrices to a pair of banded symmetric matrices. When the circuit comprises only two of the three RLC components, the matrices are also positive definite. These matrices are typically much smaller than the original circuit matrices and determine a reduced-order model of the original multi-port transfer function of the circuit. The reduced transfer function represents a matrix-Pade approximation of the original multi-port matrix transfer function.

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