Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Nonlinear amplifying circuit
Reexamination Certificate
2003-01-31
2004-06-22
Le, Dinh (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
Nonlinear amplifying circuit
C327S051000, C330S271000
Reexamination Certificate
active
06753726
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
Embodiments of the present invention relate to sensing circuits. More particularly, embodiments of the present invention relate generally to a sensing circuit that is capable of correcting for offset voltage associated with a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) amplifier.
2. Related Art
Amplification of extremely weak input signals is one circuit approach for sensing an input signal. In particular, the sensing circuit can utilize amplifiers comprised of metal oxide semiconductor field effect transistors (MOSFETs) for amplification purposes. Standard configurations implementing complementary-symmetry MOSFET (CMOS) circuits may utilize two or more enhancement-type MOSFETs (e.g., a p-channel MOSFET (PMOS) device and an n-channel MOSFET (NMOS) device) for amplification having linear input-output characteristics.
A particular problem inherent with the use of MOSFET amplifiers is the offset voltage. More specifically, an amplifier configuration produces an amplified signal at its output node that is centered on the threshold voltage of the amplifier. The effect of the offset voltage can be visualized as a direct current (DC) voltage across the device that is not zero when current is not flowing through the amplifier.
The offset voltage due to local threshold voltage and current factor mismatches between the NMOS and the PMOS in the amplifier can result in lower resolution in a sensing circuit that utilizes the amplifier. A further problem is that any offset voltage is amplified by the gain of the amplifier. For example, an offset voltage of 40-50 millivolts in the amplifier can reduce the resolution of the sensing-circuit, such that an input signal of less than 40-50 millivolts is detected incorrectly by the sensing circuit.
One solution cancels the offset voltage through a feedback circuit configuration. In one implementation, the feedback circuit can be represented as a resistive feedback circuit. Associated with the feedback circuit is a parasitic capacitance. The parasitic capacitance in conjunction with Miller capacitive effects combine to reduce the strength of the input signal by a factor of 10 or greater.
In order to operate at the lower frequencies, it is necessary to increase the feedback resistance in the resistive feedback circuit. Prior art solutions implement a long channel MOSFET device or a long polysilicon line in the feedback resistive circuit to increase the feedback resistance. Unfortunately, these prior art approaches also increase the total capacitance associated with the resistive feedback circuit. As a result, the attenuation of the input signals due to the capacitive effects brings the input signal below the range of sensitivity for the sensing circuit, such that, the sensing circuit cannot detect the attenuated input signal.
SUMMARY OF THE INVENTION
Accordingly, various embodiments of the present invention disclose an apparatus and method for a sensing circuit that is capable of cancelling offset voltage. Embodiments of the present invention are able to operate at frequencies below 20 MHz in part because the circuit exhibits high resistivity and low capacitance.
Specifically, embodiments of the present invention describe an apparatus and method for a sensing circuit comprising a resistive feedback circuit for cancelling an offset voltage. In one embodiment, a CMOS inverter amplifier may be used to amplify an input signal present at an input node. The input signal may be an extremely weak signal, such as a 3.3 volt clock signal capacitively coupled through as little as 0.1 fF of capacitance, in one embodiment.
According to one exemplary embodiment, a resistive feedback circuit is coupled to the CMOS inverter amplifier for cancelling an input offset voltage that is associated with the CMOS inverter amplifier. The input offset voltage is partly due to NMOS and PMOS transistor mismatches in the CMOS inverter amplifier. The resistive feedback circuit cancels the input offset voltage by biasing the CMOS inverter amplifier to its threshold voltage. A bias circuit is coupled to the resistive feedback circuit for biasing MOSFET transistors in the resistive feedback circuit at a subthreshold conduction region. When operating in this region, the resistive feedback circuit presents a high impedance to the input node, thereby allowing operation of the sensing circuit at the lower frequencies below 20 MHz, in one embodiment.
A clamping circuit, coupled to the resistive feedback circuit, maintains operation of the transistors in the resistive feedback circuit within the subthreshold conduction region. In one embodiment, the clamping circuit operates only during the larger input voltages. With the clamping circuit, the larger input voltages would first turn on the MOSFET transistors in the clamping circuit before the MOSFET transistors in the resistive feedback circuit. As a result, the resistive feedback circuit maintains its high impedance to allow for amplification of signals at the lower frequencies below 20 MHz.
In addition, by operating MOSFETs in the resistive feedback circuit continuously in subthreshold conduction region, the high impedance of the resistive feedback circuit is accomplished without increasing the capacitance of the resistive feedback circuit. As a result, the resolution of the sensing circuit is increased because capacitive effects that attenuate the input signal are reduced.
REFERENCES:
patent: 4177428 (1979-12-01), Klank
patent: 5721516 (1998-02-01), Furuchi
patent: 6384620 (2002-05-01), Yamada et al.
patent: 408181924 (1994-12-01), None
Drost Robert J.
Sutherland Ivan E.
Le Dinh
Martine & Penilla LLP
Sun Microsystems Inc.
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