Apparatus and method for an address transition detector

Details Apparatus and method for an address transition detector Apparatus and method for an address transition detector

1994-11-30

1996-05-21

Nguyen, Tan T.

Static information storage and retrieval

Addressing

Sync/clocking

365206, 327161, 327263, 327 31, 327 24, G11C 11415

Patent

active

055196667

ABSTRACT:
An address transition detector stores a first output signal on an output terminal for a first predetermined period of time in response to an initial edge of an internal address signal pulse. The address transition detector stores a second output signal on the output terminal for a second predetermined period of time in response to the trailing edge of the internal address signal pulse. When the trailing edge of the internal address signal pulse is delayed from the leading edge of the internal address signal pulse by an amount greater than the first predetermined period, then output signal consists of two pulses. When the trailing edge of the internal address signal pulse is delayed from the leading edge by a time less than the first predetermined period, then the signal on the output terminal is a single expanded signal. Typically, the first and second predetermined periods are equal.

REFERENCES:
patent: 5072131 (1991-12-01), Nakano
patent: 5319607 (1994-06-01), Fujii et al.

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