Apparatus and method for adjusting sampling clock phase in...

Coded data generation or conversion – Converter compensation

Reexamination Certificate

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Details

C341S155000

Reexamination Certificate

active

07034721

ABSTRACT:
An apparatus and method for adjusting a sampling clock phase in an analog-digital converter are disclosed. The apparatus includes a window operation unit assigning at least one window to a sampled image, and calculating operation values for pixels corresponding to each window, a controller controlling analog-digital converter sampling clock phase control signals by using the calculated operation values for the pixels, and an analog-digital converter adjusting the phase of the analog-digital converter sampling clock depending upon the analog-digital converter sampling clock phase control signals.

REFERENCES:
patent: 5533060 (1996-07-01), Kameo et al.
patent: 5910651 (1999-06-01), Ryvkin
patent: 6483447 (2002-11-01), Eglit
patent: 1996-0020008 (1996-06-01), None
patent: 0198610 (1999-03-01), None

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