Boots – shoes – and leggings
Patent
1992-01-10
1995-04-04
Harvey, Jack B.
Boots, shoes, and leggings
364254, 3642543, 3642549, 3642551, 364259, 3642591, 364DIG1, G06F 1206
Patent
active
054044740
ABSTRACT:
A method and apparatus for aliasing an address for a location in a memory system. The aliasing permits an address generating unit to access a memory block of variable size based upon an address space of fixed size so that the size of the memory block can be changed without changing the address generating software of the address generating unit. The invention provides an address aliasing device arranged to receive an address from the address generating unit. The address aliasing device includes a register that stores memory block size information. The memory block size information is read by the address aliasing device and decoded to provide bit information representative of the size of the memory block. The address aliasing device logically combines the bit information with appropriate corresponding bits of the input address to provide an alias address that is consistent with the size of the memory block.
REFERENCES:
patent: 5093783 (1992-03-01), Kitada
patent: 5109334 (1992-04-01), Kamuro
patent: 5150471 (1992-09-01), Tipon
patent: 5210839 (1993-05-01), Powell et al.
Bryant Stewart F.
Crook Neal A.
Lenthall John M.
Seaman Michael J.
Digital Equipment Corporation
Harvey Jack B.
Whitfield Michael A.
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