Apparatus and method for a space saving translation lookaside bu

Details Apparatus and method for a space saving translation lookaside bu Apparatus and method for a space saving translation lookaside bu

1990-12-18

1993-06-22

Dixon, Joseph L.

Boots, shoes, and leggings

395425, 364DIG1, 364DIG2, G06F 1206, G06F 1208, G06F 1210, G06F 1214

Patent

active

052222225

ABSTRACT:
A method and apparatus for saving memory space in a buffer whereby the valid bit in the entry of the translation lookaside buffer for a cache memory is collapsed into one of the level bits indicating the length of the virtual address. During the lookup of the translation lookaside buffer, the virtual address in each entry is compared with the virtual address from the CPU if the level/valid bit is set, i.e. the entry is valid. If the level/valid bit is not set, then no compare takes place and the lookup continues to the next entry. The length of the virtual address to be compared is further determined by the status of the remaining level bits.

REFERENCES:
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patent: 4680700 (1987-07-01), Hester et al.
patent: 4835734 (1989-05-01), Kodaira et al.
patent: 4914577 (1990-04-01), Stewart et al.
patent: 5058003 (1991-10-01), White
patent: 5133058 (1992-07-01), Jensen
Smith, "Cachememories" Computing Surveys, vol. 14, No. 3, Sep. 82, pp. 473-529.

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