Apparatus and method for a precision bi-directional trim scheme

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S543000, C327S404000, C323S312000, C323S313000, C323S315000

Reexamination Certificate

active

06819164

ABSTRACT:

FIELD OF THE INVENTION
The present invention is generally related to trimming circuitry. More particularly, the present invention is related to bi-directionally trimming a reference.
BACKGROUND OF THE INVENTION
Common electronic circuits often require precision voltages and/or currents. For example, a shunt regulator may be arranged to regulate an output voltage by comparing the sensed input voltage to a reference voltage. The accuracy of the regulation is directly impacted by variations in the reference voltage. Improved accuracy can be achieved in a voltage reference through “trimmed” adjustments.
An example circuit for trimming a voltage reference includes a resistor chain with zener diodes, The zener diodes are coupled in parallel to each of the resistors on the chain. The reference voltage is trimmed by activating or deactivating a certain number of the zener diodes to adjust the reference voltage.
SUMMARY OF THE INVENTION
Briefly stated, a circuit is arranged to enable bi-directional trimming of a reference voltage. A trim current is generated by mirroring a bias current using one or more selectable current source circuits. The selectable current source circuits may each contain transistors that are sized differently from corresponding transistors of the other selectable current source circuits. The sizing may be arranged in a binary chain such that a range of currents may be generated for the trim current while allowing for selection of the level of adjustment for the reference voltage. The current selected for the trim current depends on which of the selectable current sources is enabled. The node corresponding to the trim current is selectively coupled to a load to either increase the voltage across the load or decrease the voltage across the load, providing bi-directional trimming of the reference voltage measured across the load.
In accordance with an aspect of the present invention, an apparatus includes a current source circuit that is arranged to provide a bias current to a load when active. A first selectable current source circuit is arranged to provide a first current when enabled. The first current corresponds to at least a portion of a trim current. The apparatus further includes a first switch circuit that is arranged to selectively couple the trim current to the load. The trim current is coupled to the load when the first switch circuit is closed increasing a voltage across the load. A second switch circuit is arranged to selectively couple the trim current to a current mirror circuit when the second switch circuit is closed. The current mirror circuit is arranged to draw current from the load decreasing the voltage across the load. The second switch circuit is closed when the first switch circuit is open, and the first switch circuit is closed when the second switch circuit is open.
In accordance with another aspect of the present invention, the apparatus further includes a second selectable current source circuit that is arranged to provide a second current when enabled. The sum of the first current and the second current correspond to the trim current. The first selectable current source circuit includes transistors that are sized differently than corresponding transistors of the second selectable current source circuit. The different sizing results in the first current and the second current being different.
In accordance with yet another aspect of the present invention, the apparatus includes a third selectable current source circuit that is arranged to provide a third current when enabled. The third current correspond to at least a portion of the trim current. Also, the first, second, and third selectable current source circuits are arranged in a binary chain.
In accordance with a further aspect of the present invention, the first selectable current source circuit includes two transistors. The first transistor is arranged to substantially mirror the bias current to produce the first current. The second transistor is arranged to operate as a switch for enabling and disabling the first selectable current source circuit. The second transistor is activated or deactivated by an enable signal so that the first current is decoupled from or coupled to a node that corresponds to the trim current. Alternatively, the first selectable current source circuit includes a transistor that is arranged to substantially mirror the bias current to produce the first current, a third switch circuit; and a fourth switch circuit. The third and fourth switch circuits are actuated to enable or disable the first selectable current source circuit. Additionally, the third switch circuit either couples the transistor to or decouples the transistor from the bias current when actuated. The fourth switch circuit activates or deactivates the transistor when actuated. The transistor is prevented from substantially mirroring the bias current when the transistor is deactivated.
The invention may also be implemented as methods that perform substantially the same functionality as the embodiments of the invention discussed above and below.
A more complete appreciation of the present invention and its improvements can be obtained by reference to the accompanying drawings, which are briefly summarized below, to the following detail description of presently preferred embodiments of the invention, and to the appended claims.


REFERENCES:
patent: 5004971 (1991-04-01), Fitzpatrick et al.
patent: 5315270 (1994-05-01), Leonowich
patent: 5717321 (1998-02-01), Kerth et al.
patent: 6087820 (2000-07-01), Houghton et al.
patent: 6163184 (2000-12-01), Larsson
patent: 6265859 (2001-07-01), Datar et al.
patent: 6388494 (2002-05-01), Kindt et al.
patent: 6462527 (2002-10-01), Maneatis

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