Apparatus and method for a PHY transmitter with programmable...

Telephonic communications – Telephone line or system combined with diverse electrical... – Having transmission of a digital message signal over a...

Reexamination Certificate

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Details

C379S399020

Reexamination Certificate

active

06377666

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a transmitter circuit and more particularly, to methods and systems utilizing a programmable control logic for driving data signals over residential wiring, or the like, in a high power mode or a low power mode.
BACKGROUND ART
Local Area Networks (LANs) play a vital role in the successful and efficient operation of the modem office. Workers are able to exchange ideas and documents freely in a collaborative fashion. A LAN also provides a cost effective way to share resources such as information servers, printers, modems, and other peripheral devices. Manufacturers of LAN products continually develop better and lower cost devices, making the implementation of LAN technology viable for even the smallest businesses. Along with the advances in LAN technology, the traditional concept of the office has changed. The modem office has become much more mobile as laptop personal computers are deployed with increasing frequency. Further, the culture of the traditional office has shifted to a more flexible approach in which workers are encouraged to telecommute. Therefore, the personal computer (PC) is becoming a standard “appliance” within the home.
A number of factors contribute to the growing need for PCs in the home. The educational system of today has continued to integrate the use of the PC into the schools' daily curriculum. In addition, the World Wide Web has become a universal knowledge base; as such, millions of homes enjoy access to this invaluable resource. It is not unrealistic that today's families possess multiple computers within the home in which one is dedicated to work and another to conduct personal transactions. In fact, most consumer PC purchases are now largely second purchases. Another key factor is the consumers' need to keep up with the rapid advancement in central processing units (CPUs) to effectively run the latest applications. Thus, consumers are accumulating multiple PCs within their homes.
With an increasing number of homes having multiple PCs, it is a logical extension to try and gain the benefits of a local area network. For example, a printer can be shared to avoid having to unnecessarily purchase multiple printers. Also, communication resources such as modems can be shared, which is desirable given the fact that most homes have only a single line allocated for data communication and facsimile transmissions. The problem, however, is that the conventional home is not appropriately wired for data networking. Nertheless, home phoneline networking has stirred great interest among the public as well as the data networking community.
The concept of home phoneline networking involves the use of standard twisted copper pair cables that exist within most of today's conventional homes for the physical infrastructure of the data network. For example, Ethernet LANs operating at about 1.0 Mbps may be deployed. The data signals coexist with the telephone signals; thus, no additional wiring is required. These data signals are generated by physical (PHY) layer devices (e.g., a transceiver).
FIG. 1A
shows a typical implementation of the 1.0 Mbps Ethernet network involving two stations
101
,
107
. These stations
101
,
107
are connected to standard RJ-
11
phone jacks
103
a
,
103
b
, respectively, over plain old telephone service (POTS) wiring
105
. While Station
1
(
101
) and Station
2
(
107
) are communicating, telephone
109
that is connected to phone jack
103
c
may continue to make phone calls. An important aspect of this home network is the ability to produce electrical signals cleanly over the POTS wires. Past attempts at home phoneline networking have been thwarted by electrical noise problems stemming from reflections to poor wire conditions.
FIG. 1B
represents an exploded view of Station
1
(
101
), in which a PC
111
interfaces with a line circuit
112
(or transceiver) to transfer data. The line circuit
112
conventionally has a transmitter
115
for sending the data signals and a receiver
117
to retrieve data signals from another station. Line coupler
119
, which connects to phone jack
103
a
, conditions the signals for transmission over the POTS wire.
With common residential phone wiring, the line circuit
112
needs to drive over a specific voltage swing; that is, a specific power mode.
FIG. 5
shows a conventional line circuit
112
having two transmit drivers
505
,
507
. The line circuit
112
also has a receiver
503
. Essentially, the line circuit
112
is required to drive under two power modes, a high mode and a low mode, as well as at different transmit rates on a 50&OHgr; load. The conventional line circuit
112
addresses the above requirements separately, using two different power mode drivers. Driver
505
operates in low power mode, whereby the transmitter waveform has a peak to peak level of about 0.6 V. The other driver
507
is a high power mode driver, which exhibits a peak to peak voltage level of 1.2 V. Because two drivers
505
,
507
are used, a complementary metal oxide semiconductor (CMOS) integrated circuit (IC) must have a minimum of six nodes and eight external resistors. The nodes are for the following signals: low power mode transmit negative signal (Tx_n), voltage for gain control—lower power mode (VGL), low power mode transmit positive signal (Tx_p), high power mode transmit negative signal (TxHP_n), voltage for gain control—high power mode (VGH), high power mode transmit positive signal (TxHP_p). The number of nodes corresponds to the number of pins required by the IC. The higher the number of pins, the larger the die size must be. External resistors also occupy precious chip real estate; further, they consume more power. Resistive circuit
501
has eight resistors, in addition to the load resistance. Thus, in IC fabrication, a large number of nodes and external resistors, as required by the use of two drivers, significantly increases the cost of the IC.
DISCLOSURE OF THE INVENTION
There is a need for a line circuit that utilizes a minimal number of nodes for the transfer of signals, and reduces the pin count required by the IC for implementation. There is also a need for a line circuit that reduces or eliminates entirely the use of external resistors. In addition, there is a need for driving a residential transmission line in two power modes using a single driver.
These and other needs are attained by the present invention, where a line driver circuit employs two nodes and no external resistors to transmit signals exhibiting the desired power mode, waveform shape, and edge rate over residential grade wiring, or the like.
In accordance with one aspect of the present invention, a line circuit for transmitting data signals as positive and negative output currents in a data communication network. The line circuit comprises a digitally controlled current source. A single current amplifier is coupled to the digitally controlled current source for generating the positive output current and the negative output current in different power modes. The single current amplifier is driven by the digitally controlled current source. Hence, the line circuit advantageously supplies output currents in two different power modes using a single driver.
Another aspect of the present invention provides a line circuit for transferring data over residential grade wiring. The line circuit comprises programmable control logic configured for generating a digital power level control (DLC) signal, a positive control signal, and a negative control signal. The DLC signal specifies a high power mode or a low power mode. The positive control signal and the negative control signal indicate waveform shape and edge rate information associated with a positive output current and a negative output current. A front-end digital/analog convertor (DAC) is configured for receiving the DLC signal and generating an output signal of the specified power mode. An intermediate DAC is configured for receiving the output signal of the front-end DAC, the positive control signal, and the

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