Apparatus and method for a NMOS redundancy fuse passgate circuit

Details Apparatus and method for a NMOS redundancy fuse passgate circuit Apparatus and method for a NMOS redundancy fuse passgate circuit

1995-05-09

1997-02-04

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Redundant

327525, 327408, 327407, 3652287, 326 10, 326113, G11C 700

Patent

active

056002777

ABSTRACT:
A redundancy passgate circuit is implemented in NMOS technology in order to provide a more rapid transmission of the transmitted signals. The circuit provides for the more rapid signal transmission by reducing the capacitance experienced by the input signals. The reduced capacitance loading is achieved at the expense of a greater layout area and a requirement for an on-chip power supply.

REFERENCES:
patent: 5359559 (1994-10-01), Nomura et al.
patent: 5402390 (1995-03-01), Ho et al.

Affiliated with

Also associated with

Rating

Apparatus and method for a NMOS redundancy fuse passgate circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus and method for a NMOS redundancy fuse passgate circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for a NMOS redundancy fuse passgate circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-682927