Apparatus and method employing a window reset for excessive bit

Details Apparatus and method employing a window reset for excessive bit Apparatus and method employing a window reset for excessive bit

1995-09-29

1998-03-03

Beausoliel, Jr., Robert W.

Excavating

371 682, G06F 1100

Patent

active

057243620

ABSTRACT:
Methods and apparatus for generating and clearing an excessive bit error rate (EBER) alarm are provided and utilize a reset window algorithm. The BIP-8 bytes (e.g., B2 bytes) of incoming data blocks (each block being B frames long) of an STSn telecommunications signal are monitored in an "idle state" for code violation counts (CV). Upon receiving a data block having a code violation count meeting or exceeding a code violation count threshold (CVSET), a counter is initialized in a "crossing calculation state", and a window comprising a plurality (W) of blocks is monitored. The counter counts the number of incoming blocks in the window having a CV which meets or exceeds CVSET. If in the crossing calculation state, the count meets or exceeds its own threshold (X), an alarm state is entered and an EBER alarm is set. If not, the system returns to the "idle state". Once in the alarm state, every received block is monitored for its code violation count. The first received block with a CV count of CVCLR (code violation clear) or less initializes a clearing calculation state" which sets a clearing-counter CC. The clearing counter CC is used to count the number of incoming blocks in the window having a CV of CVCLR or less. If the CC count meets a third threshold value Y within the time window, the alarm is cleared and the system returns to the idle state. Otherwise, the system reverts to the alarm state.

REFERENCES:
patent: 3916379 (1975-10-01), Dulaney et al.
patent: 5138616 (1992-08-01), Wagner, Jr. et al.
patent: 5467341 (1995-11-01), Matsukane et al.
patent: 5570373 (1996-10-01), Wing

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