Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal
Reexamination Certificate
2007-05-29
2007-05-29
Andujar, Leonardo (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
C257SE21545, C438S048000
Reexamination Certificate
active
10266724
ABSTRACT:
Fabricating electrical isolation properties into a MEMS device is described. One embodiment comprises a main substrate layer of a high-resistivity semiconductor material, such as high-resistivity silicon. The high-resistivity substrate is then controllably doped to provide a region of high-conductivity in the main substrate. Electrical isolation is achieved in such an embodiment by patterning the high-conductivity region either by masking the main substrate during the doping or etching through the doped, high-conductivity region in order to form regions of high conductivity. Effective isolation results from confinement of electrical currents to the lowest-resistance path. An alternative embodiment employs the fabrication of pn junctions and the use of reverse biasing to enhance the electrical isolation. A further embodiment comprises a main substrate layer of low-resistivity semiconductor material with a layer of insulator deposited thereon. High-conductivity or low-resistivity material is then grown on top of the insulator to create electrically isolated conductors.
REFERENCES:
patent: 5650568 (1997-07-01), Greiff et al.
patent: 5811315 (1998-09-01), Yindeepol et al.
patent: 5846849 (1998-12-01), Shaw et al.
patent: 6051866 (2000-04-01), Shaw et al.
patent: 6055460 (2000-04-01), Shopbell
patent: 6121552 (2000-09-01), Brosnihan et al.
patent: 6187684 (2001-02-01), Farber et al.
patent: 6239473 (2001-05-01), Adams et al.
patent: 6277666 (2001-08-01), Hays et al.
patent: 6291875 (2001-09-01), Clark et al.
patent: 6306729 (2001-10-01), Sakaguchi et al.
patent: 6428713 (2002-08-01), Christenson et al.
patent: 6573154 (2003-06-01), Sridhar et al.
patent: 6673694 (2004-01-01), Borenstein
patent: 2002/0011759 (2002-01-01), Adams et al.
Zhang, Dacheng, et al.;A novel isolation technology in bulk micromachining using deep reactive ion etching and a polysilicon refill; Journal of J. Mecromech. Microeng. vol. 11, 2001, pp. 13-19.
Muller, Lilac, et al.;Electrical isolation process for molded, high-aspect-ration polysilicon microstructures; Dept. of Mechanical Engineering, University of California at Berkeley, 6 pages.
Ayazi, Farrokh, et al.;High aspect-ratio combined poly and single-crystal silicon (HARPSS) MEMS technology; Journal of J. Microelectromechanical Systems, vol. 9, No. 3, Sep. 2000, pp. 288-294.
Forsberg, M., et al.;Shallow and deep trench isolation for use in RF-biopolar IC:s; Applied Materials, 4 pages.
Magel Gregory A.
Roberts Charles G.
Skidmore George D.
Andujar Leonardo
Haynes and Boone LLP
Quinto Kevin
Zyvex Corporation
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