Apparatus and associated method for making a virtual ground...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185160, C257S314000

Reexamination Certificate

active

07486560

ABSTRACT:
A virtual ground array structure uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities and smaller packaging.

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patent: 7158420 (2007-01-01), Lung
patent: 2005/0062096 (2005-03-01), Sasago et al.
patent: 2006/0245246 (2006-11-01), Lung
Boaz Eitan, Paolo Pavan, Ilan Bloom, Efraim Aloni, Aviv Frommer and David Finzi, NROM: A novel Localized Trapping, 2-Bit Nonvolatile Memory Cell, IEEE Electron Device Letters, vol. 21, No. 11, Nov. 2000.
Y. Sasago, et al., 90-nm-node Multi Level AG-AND Type Flash Memory with Cell Size of True 2F2/bit and Programming Throughout of 10 MB/s, IEEE, 2003.

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